Patents by Inventor Bruce Hui Kwan

Bruce Hui Kwan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240039852
    Abstract: Approaches, techniques, and mechanisms are disclosed for improving operations of a network switching device and/or network-at-large by utilizing queue delay as a basis for measuring congestion for the purposes of Automated Queue Management (“AQM”) and/or other congestion-based policies. Queue delay is an exact or approximate measure of the amount of time a data unit waits at a network device as a consequence of queuing, such as the amount of time the data unit spends in an egress queue while the data unit is being buffered by a traffic manager. Queue delay may be used as a substitute for queue size in existing AQM, Weighted Random Early Detection (“WRED”), Tail Drop, Explicit Congestion Notification (“ECN”), reflection, and/or other congestion management or notification algorithms. Or, a congestion score calculated based on the queue delay and one or more other metrics, such as queue size, may be used as a substitute.
    Type: Application
    Filed: October 10, 2023
    Publication date: February 1, 2024
    Inventors: William Brad MATTHEWS, Bruce Hui KWAN, Puneet AGARWAL
  • Patent number: 11888931
    Abstract: Efficient scaling of in-network compute operations to large numbers of compute nodes is disclosed. Each compute node is connected to a same plurality of network compute nodes, such as compute-enabled network switches. Compute processes at the compute nodes generate local gradients or other vectors by, for instance, performing a forward pass on a neural network. Each vector comprises values for a same set of vector elements. Each network compute node is assigned to, based on the local vectors, reduce vector data for a different a subset of the vector elements. Each network compute node returns a result chunk for the elements it processed back to each of the compute nodes, whereby each compute node receives the full result vector. This configuration may, in some embodiments, reduce buffering, processing, and/or other resource requirements for the network compute node or network at large.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: January 30, 2024
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Puneet Agarwal, Bruce Hui Kwan
  • Patent number: 11855901
    Abstract: In response to certain events in a network device, visibility packets may be generated. A visibility packet may be or comprise at least a portion of a packet that is in some way associated with the event, such as a packet that was dropped as a result of an event, or that was in a queue at the time of an event related to that queue. A visibility packet may be tagged or otherwise indicated as a visibility packet. The network device may include one or more visibility samplers through which visibility packets are routed on their way to a visibility queue, visibility subsystem, and/or out of the network device. The samplers allow only a limited sample of the visibility packets that they receive to pass through the sampler, essentially acting as a filter to reduce the amount of visibility packets that will be processed.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: December 26, 2023
    Assignee: Innovium, Inc.
    Inventors: Bruce Hui Kwan, William Brad Matthews, Puneet Agarwal
  • Patent number: 11784932
    Abstract: Approaches, techniques, and mechanisms are disclosed for improving operations of a network switching device and/or network-at-large by utilizing queue delay as a basis for measuring congestion for the purposes of Automated Queue Management (“AQM”) and/or other congestion-based policies. Queue delay is an exact or approximate measure of the amount of time a data unit waits at a network device as a consequence of queuing, such as the amount of time the data unit spends in an egress queue while the data unit is being buffered by a traffic manager. Queue delay may be used as a substitute for queue size in existing AQM, Weighted Random Early Detection (“WRED”), Tail Drop, Explicit Congestion Notification (“ECN”), reflection, and/or other congestion management or notification algorithms. Or, a congestion score calculated based on the queue delay and one or more other metrics, such as queue size, may be used as a substitute.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: October 10, 2023
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Bruce Hui Kwan, Puneet Agarwal
  • Patent number: 11750487
    Abstract: Approaches, techniques, and mechanisms facilitate actionable reporting of network state information and real-time, autonomous network engineering directly in-network at a switch or other network device. A data collector within the network device collects state information and/or data unit information from various device components, such as traffic managers and packet processors. The data collector, which may optionally generate additional state information by performing various calculations on the information it receives, is configured to then provide at least some of the state information to an analyzer device connected to an analyzer interface. The analyzer device, which may be a separate device, performs various analyses on the state information, depending on how it is configured. The analyzer device outputs reports that identify statuses, errors, misconfigurations, and/or suggested actions to take to improve operation of the network device.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: September 5, 2023
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Bruce Hui Kwan
  • Patent number: 11677676
    Abstract: A traffic manager is shared amongst two or more egress blocks of a network device, thereby allowing traffic management resources to be shared between the egress blocks. Schedulers within a traffic manager may generate and queue read instructions for reading buffered portions of data units that are ready to be sent to the egress blocks. The traffic manager may be configured to select a read instruction for a given buffer bank from the read instruction queues based on a scoring mechanism or other selection logic. To avoid sending too much data to an egress block during a given time slot, once a data unit portion has been read from the buffer, it may be temporarily stored in a shallow read data cache. Alternatively, a single, non-bank specific controller may determine all of the read instructions and write operations that should be executed in a given time slot.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: June 13, 2023
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Puneet Agarwal, Bruce Hui Kwan
  • Patent number: 11637786
    Abstract: When a measure of buffer space queued for garbage collection in a network device grows beyond a certain threshold, one or more actions are taken to decreasing an enqueue rate of certain classes of traffic, such as of multicast traffic, whose reception may have caused and/or be likely to exacerbate garbage-collection-related performance issues. When the amount of buffer space queued for garbage collection shrinks to an acceptable level, these one or more actions may be reversed. In an embodiment, to more optimally handle multi-destination traffic, queue admission control logic for high-priority multi-destination data units, such as mirrored traffic, may be performed for each destination of the data units prior to linking the data units to a replication queue. If a high-priority multi-destination data unit is admitted to any queue, the high-priority multi-destination data unit can no longer be dropped, and is linked to a replication queue for replication.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: April 25, 2023
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Puneet Agarwal, Bruce Hui Kwan, Ajit Kumar Jain
  • Publication number: 20220294848
    Abstract: Efficient scaling of in-network compute operations to large numbers of compute nodes is disclosed. Each compute node is connected to a same plurality of network compute nodes, such as compute-enabled network switches. Compute processes at the compute nodes generate local gradients or other vectors by, for instance, performing a forward pass on a neural network. Each vector comprises values for a same set of vector elements. Each network compute node is assigned to, based on the local vectors, reduce vector data for a different a subset of the vector elements. Each network compute node returns a result chunk for the elements it processed back to each of the compute nodes, whereby each compute node receives the full result vector. This configuration may, in some embodiments, reduce buffering, processing, and/or other resource requirements for the network compute node or network at large.
    Type: Application
    Filed: March 12, 2021
    Publication date: September 15, 2022
    Inventors: William Brad Matthews, Puneet Agarwal, Bruce Hui Kwan
  • Patent number: 11425195
    Abstract: Efficient scaling of in-network compute operations to large numbers of compute nodes is disclosed. Each compute node is connected to a same plurality of network compute nodes, such as compute-enabled network switches. Compute processes at the compute nodes generate local gradients or other vectors by, for instance, performing a forward pass on a neural network. Each vector comprises values for a same set of vector elements. Each network compute node is assigned to, based on the local vectors, reduce vector data for a different a subset of the vector elements. Each network compute node returns a result chunk for the elements it processed back to each of the compute nodes, whereby each compute node receives the full result vector. This configuration may, in some embodiments, reduce buffering, processing, and/or other resource requirements for the network compute node or network at large.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: August 23, 2022
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Puneet Agarwal, Bruce Hui Kwan
  • Publication number: 20220150171
    Abstract: Approaches, techniques, and mechanisms are disclosed for improving operations of a network switching device and/or network-at-large by utilizing queue delay as a basis for measuring congestion for the purposes of Automated Queue Management (“AQM”) and/or other congestion-based policies. Queue delay is an exact or approximate measure of the amount of time a data unit waits at a network device as a consequence of queuing, such as the amount of time the data unit spends in an egress queue while the data unit is being buffered by a traffic manager. Queue delay may be used as a substitute for queue size in existing AQM, Weighted Random Early Detection (“WRED”), Tail Drop, Explicit Congestion Notification (“ECN”), reflection, and/or other congestion management or notification algorithms. Or, a congestion score calculated based on the queue delay and one or more other metrics, such as queue size, may be used as a substitute.
    Type: Application
    Filed: November 6, 2020
    Publication date: May 12, 2022
    Inventors: William Brad Matthews, Bruce Hui Kwan, Puneet Agarwal
  • Patent number: 11075847
    Abstract: In response to certain events in a network device, visibility packets may be generated. A visibility packet may be or comprise at least a portion of a packet that is in some way associated with the event, such as a packet that was dropped as a result of an event, or that was in a queue at the time of an event related to that queue. A visibility packet may be tagged or otherwise indicated as a visibility packet. The network device may include one or more visibility samplers through which visibility packets are routed on their way to a visibility queue, visibility subsystem, and/or out of the network device. The samplers allow only a limited sample of the visibility packets that they receive to pass through the sampler, essentially acting as a filter to reduce the amount of visibility packets that will be processed.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: July 27, 2021
    Assignee: Innovium, Inc.
    Inventors: Bruce Hui Kwan, William Brad Matthews, Puneet Agarwal
  • Patent number: 10992557
    Abstract: Approaches, techniques, and mechanisms facilitate actionable reporting of network state information and real-time, autonomous network engineering directly in-network at a switch or other network device. A data collector within the network device collects state information and/or data unit information from various device components, such as traffic managers and packet processors. The data collector, which may optionally generate additional state information by performing various calculations on the information it receives, is configured to then provide at least some of the state information to an analyzer device connected to an analyzer interface. The analyzer device, which may be a separate device, performs various analyses on the state information, depending on how it is configured. The analyzer device outputs reports that identify statuses, errors, misconfigurations, and/or suggested actions to take to improve operation of the network device.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: April 27, 2021
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Bruce Hui Kwan
  • Patent number: 10868768
    Abstract: When a measure of buffer space queued for garbage collection in a network device grows beyond a certain threshold, one or more actions are taken to decreasing an enqueue rate of certain classes of traffic, such as of multicast traffic, whose reception may have caused and/or be likely to exacerbate garbage-collection-related performance issues. When the amount of buffer space queued for garbage collection shrinks to an acceptable level, these one or more actions may be reversed. In an embodiment, to more optimally handle multi-destination traffic, queue admission control logic for high-priority multi-destination data units, such as mirrored traffic, may be performed for each destination of the data units prior to linking the data units to a replication queue. If a high-priority multi-destination data unit is admitted to any queue, the high-priority multi-destination data unit can no longer be dropped, and is linked to a replication queue for replication.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: December 15, 2020
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Puneet Agarwal, Bruce Hui Kwan, Ajit Kumar Jain
  • Patent number: 10868769
    Abstract: To more efficiently utilize buffer resources, schedulers within a traffic manager may generate and queue read instructions for reading buffered portions of data units that are ready to be sent to the egress blocks. The traffic manager may be configured to select a read instruction for a given buffer bank from the read instruction queues based on a scoring mechanism or other selection logic. To avoid sending too much data to an egress block during a given time slot, once a data unit portion has been read from the buffer, it may be temporarily stored in a shallow read data cache. Alternatively, a single, non-bank specific controller may determine all of the read instructions and write operations that should be executed in a given time slot. The read instruction queue architecture may be duplicated for link memories and other memories in addition to the buffer memory.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: December 15, 2020
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Puneet Agarwal, Bruce Hui Kwan
  • Patent number: 10846225
    Abstract: A logical bank may comprise multiple physical banks across which logical blocks, such as buffer entries, are striped. Data structures are stored in the logical blocks, with each logical block storing no more than one data structure. When writing a data structure, if the data structure is less than half the logical block size, one or more duplicate copies of the data structure may be stored in the otherwise unused physical blocks of the logical block. Before executing a first read instruction to read a first data structure from a first logical block, if the first data structure can be read without accessing one or more of the physical banks, a second read instruction for a second data structure may be analyzed to determine if there is a copy of a second data structure within the one or more unneeded physical banks. If so, the two read instructions are consolidated.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: November 24, 2020
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Puneet Agarwal, Bruce Hui Kwan
  • Patent number: 10764208
    Abstract: A distributed switch architecture supports very high bandwidth applications. For instance, the distributed switch architecture may be implemented for cloud networks. The architecture scales by organizing traffic management components into tiled structures with distributed buffering. The tile structures are replicated and interconnected to perform transfers from ingress to egress using an interconnect bandwidth scheduling algorithm. Bandwidth scaling may be achieved by adding more tiles to achieve higher bandwidth. The interconnect in the architecture may be swapped out depending on implementation parameters, e.g., physical efficiency.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: September 1, 2020
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Amit Kumar, William Brad Matthews, Bruce Hui Kwan, Puneet Agarwal
  • Patent number: 10742558
    Abstract: A traffic manager is shared amongst two or more egress blocks of a network device, thereby allowing traffic management resources to be shared between the egress blocks. Among other aspects, this may reduce power demands and allow a larger amount of buffer memory to be available to a given egress block that may be experiencing high traffic loads. Optionally, the shared traffic manager may be leveraged to reduce the resources required to handle data units on ingress. Rather than buffer the entire unit in the ingress buffers, an arbiter may be configured to buffer only the control portion of the data unit. The payload of the data unit, by contrast, is forwarded directly to the shared traffic manager, where it is placed in the egress buffers. Because the payload is not being buffered in the ingress buffers, the ingress buffer memory may be greatly reduced.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: August 11, 2020
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Puneet Agarwal, Bruce Hui Kwan
  • Patent number: 10728156
    Abstract: A switch architecture includes an ingress module, ingress fabric interface module, and a switch fabric. The switch fabric communicates with egress fabric interface modules and egress modules. The architecture implements multiple layers of congestion management. The congestion management may include fast acting link level flow control and more slowly acting end-to-end flow control. The switch architecture simultaneously provides high scalability, with low latency and low frame loss.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: July 28, 2020
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Bruce Hui Kwan, Puneet Agarwal, Mohan Kalkunte, Nicholas Kucharewski, III
  • Patent number: 10652154
    Abstract: Approaches, techniques, and mechanisms facilitate actionable reporting of network state information and real-time, autonomous network engineering directly in-network at a switch or other network device. A data collector within the network device collects state information and/or data unit information from various device components, such as traffic managers and packet processors. The data collector, which may optionally generate additional state information by performing various calculations on the information it receives, is configured to then provide at least some of the state information to an analyzer device connected to an analyzer interface. The analyzer device, which may be a separate device, performs various analyses on the state information, depending on how it is configured. The analyzer device outputs reports that identify statuses, errors, misconfigurations, and/or suggested actions to take to improve operation of the network device.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: May 12, 2020
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Bruce Hui Kwan
  • Patent number: 10587536
    Abstract: Techniques for improved handling of queues of data units are described, such as queues of buffered data units of differing types and/or sources within a switch or other network device. When the size of a queue surpasses the state entry threshold for a certain state, the queue is said to be in the certain state. While in the certain state, data units assigned to the queue may be handled differently in some respect, such as being marked or being dropped without further processing. The queue remains in this certain state until its size falls below the state release threshold for the state. The state release threshold is adjusted over time in, for example, a random or pseudo-random manner. Among other aspects, in some embodiments, this adjustment of the state release threshold addresses fairness issues that may arise with respect to the treatment of different types or sources of data units.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: March 10, 2020
    Assignee: Innovium, Inc.
    Inventors: Bruce Hui Kwan, Puneet Agarwal