Abstract: A duty cycle based AC power control method reduces objectionable voltage fluctuations at a frequency that causes "flicker" by shifting the frequency of actuations of controlled devices to frequencies significantly greater than and/or less than the flicker sensitive frequency. The frequency of actuations may be redistributed (1) by segmenting the devices to provide approximately equal power requirements per actuation, (2) by providing one-half cycle actuation pulses rather than one cycle actuation pulses, and/or (3) by spacing the actuations evenly over a given time period and forcing the aggregate demand to follow a slowly rising/falling envelope. The result is the minimization of power distribution at the flicker frequency.

Abstract: A base drive compensation circuit for a power amplifier samples a fixed saturation voltage level on the output of a power transistor and couples the sampled output to an inverting input of an error amplifier having a sawtooth signal on its non-inverting input. The output of the error amplifier is a negative going signal whose duty cycle is established by the voltage level on the inverting input. The negative going signal is coupled to a switching power supply that develops a voltage which controls the base drive current to the power transistor.

Abstract: A base drive circuit for a flyback output transistor has an inductive element having series connected coils for generating a linear ramping current to the base electrode of the output transistor in response to an input pulse. A high, almost instantaneous reverse current is produced through a discharge coil that receives inductively coupled energy from the current generating coils. The ratio of the maximum input current to the discharge current is established by the number of coils generating the input current versus the number of coils in the discharge circuit. Linearity of the base drive current is maintained by dissipating any excess energy in the inductive element to ground prior to each input pulse.

Abstract: A silicon controlled rectifier (SCR) is connected between a selected electrode of a CRT and a reference potential level that is negative relative to the selected CRT electrode. The SCR remains non-conductive so long as the voltage between the selected electrode and the reference potential level remains below the breakdown voltage of the SCR and the SCR's dv/dt rating is not exceeded. If the voltage between the electrode and the reference potential level increases at a rate that exceeds the threshold rate for the SCR, the SCR turns on and shorts the selected electrode to the reference potential level.

Abstract: A power amplifier circuit for driving an inductive load comprises a capacitor coupled between first and second circuit nodes, a first unidirectionally-conductive device having a first terminal coupled to the first circuit node, and a transistor having its collector coupled to the second terminal of the first unidirectionally-conductive device and having its emitter coupled to the second circuit node. The direction of conduction of the first unidirectionally-conductive device is the same as the direction of conduction through the collector-emitter path of the transistor. The circuit also comprises a second unidirectionally-conductive device connected in parallel with the first unidirectionally-conductive device for conducting current in the opposite direction from the direction of conduction of the first unidirectionally-conductive device.

Abstract: A circuit including a conventional digital-to-analog converter (DAC) and a charge pump for producing an analog representation of an input waveform defined by an input digital bit stream, the analog representation being relatively free of spurious aberrations usually present in the output of a conventional DAC. The charge pump and an associated integrator are used to produce a first approximation of the input waveform and the DAC and an associated detuned slew-rate filter are used to maintain the first approximation in long-term conformance with a more accurate second approximation. Spurious aberrations in the second approximation are integrated over several steps of the input bit stream, thereby minimizing their adverse impact on the relatively true first approximation.