Patents by Inventor Bruce Kenneth Furman
Bruce Kenneth Furman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8002477Abstract: Optical devices, components and methods for mounting optical fibers and for side-coupling light to/from optical fibers using a modified silicon V-groove, or silicon V-groove array, wherein V-grooves, which are designed for precisely aligning/spacing optical fibers, are “recessed” below the surface of the silicon. Optical fibers can be recessed below the surface of the silicon substrate such that a precisely controlled portion of the cladding layer extending above the silicon surface can be removed (lapped). With the cladding layer removed, the separation between the fiber core(s) and optoelectronic device(s) can be reduced resulting in improved optical coupling when the optical fiber silicon array is connected to, e.g., a VCSEL array.Type: GrantFiled: August 1, 2008Date of Patent: August 23, 2011Assignee: International Business Machines CorporationInventors: Evan George Colgan, Fuad Elias Doany, Bruce Kenneth Furman, Daniel J. Stigliani, Jr.
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Publication number: 20090233079Abstract: Techniques for the fabrication of semiconductor devices are provided. In one aspect, a layer transfer structure is provided. The layer transfer structure comprises a carrier substrate having a porous region with a tuned porosity in combination with an implanted species defining a separation plane therein. In another aspect, a method of forming a layer transfer structure is provided. In yet another aspect, a method of forming a three dimensional integrated structure is provided.Type: ApplicationFiled: May 27, 2009Publication date: September 17, 2009Applicant: International Business Machines CorporationInventors: Stephen W. Bedell, Keith Edward Fogel, Bruce Kenneth Furman, Sampath Purushothaman, Devendra K. Sadana, Anna Wanda Topol
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Publication number: 20080282742Abstract: Optical devices, components and methods for mounting optical fibers and for side-coupling light to/from optical fibers using a modified silicon V-groove, or silicon V-groove array, wherein V-grooves, which are designed for precisely aligning/spacing optical fibers, are “recessed” below the surface of the silicon. Optical fibers can be recessed below the surface of the silicon substrate such that a precisely controlled portion of the cladding layer extending above the silicon surface can be removed (lapped). With the cladding layer removed, the separation between the fiber core(s) and optoelectronic device(s) can be reduced resulting in improved optical coupling when the optical fiber silicon array is connected to, e.g., a VCSEL array.Type: ApplicationFiled: August 1, 2008Publication date: November 20, 2008Inventors: Evan George COLGAN, Fuad Elias DOANY, Bruce Kenneth FURMAN, Daniel J. STIGLIANI, JR.
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Publication number: 20080280416Abstract: Techniques for the fabrication of semiconductor devices are provided. In one aspect, a layer transfer structure is provided. The layer transfer structure comprises a carrier substrate having a porous region with a tuned porosity in combination with an implanted species defining a separation plane therein. In another aspect, a method of forming a layer transfer structure is provided. In yet another aspect, a method of forming a three dimensional integrated structure is provided.Type: ApplicationFiled: July 28, 2008Publication date: November 13, 2008Inventors: Stephen W. Bedell, Keith Edward Fogel, Bruce Kenneth Furman, Sampath Purushothaman, Devendra K. Sadana, Anna Wanda Topol
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Patent number: 7440668Abstract: Optical devices, components and methods for mounting optical fibers and for side-coupling light to/from optical fibers using a modified silicon V-groove, or silicon V-groove array, wherein V-grooves, which are designed for precisely aligning/spacing optical fibers, are “recessed” below the surface of the silicon. Optical fibers can be recessed below the surface of the silicon substrate such that a precisely controlled portion of the cladding layer extending above the silicon surface can be removed (lapped). With the cladding layer removed, the separation between the fiber core(s) and optoelectronic device(s) can be reduced resulting in improved optical coupling when the optical fiber silicon array is connected to, e.g., a VCSEL array.Type: GrantFiled: September 21, 2006Date of Patent: October 21, 2008Assignee: International Business Machines CorporationInventors: Evan George Colgan, Fuad Elias Doany, Bruce Kenneth Furman, Daniel J. Stigliani, Jr.
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Patent number: 7404914Abstract: Polycrystalline materials containing crystallies of precursors to electrically conductive polymers and electrically conductive polymers are described which have an adjustable high degree of crystallinity. The intersticial regions between the crystallites contains amorphous material containing precursors to electrically conductive polymers and/or electrically conductive polymers. The degree of crystallinity is achieved by preparing the materials under conditions which provide a high degree of mobility to the polymer molecules permitting them to associate with one another to form a crystalline state. This is preferable achieved by including additives, such as plasticizers and diluents, to the solution from which the polycrystalline material is formed. The morphology of the polycrystalline material is adjustable to modify the properties of the material such as the degree of crystallinity, crystal grain size, glass transition temperature, thermal coefficient of expansion and degree of electrical conductivity.Type: GrantFiled: December 1, 2000Date of Patent: July 29, 2008Assignee: International Business Machines CorporationInventors: Marie Angelopoulos, Bruce Kenneth Furman
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Patent number: 7116886Abstract: Optical devices, components and methods for mounting optical fibers and for side-coupling light to/from optical fibers using a modified silicon V-groove, or silicon V-groove array, wherein V-grooves, which are designed for precisely aligning/spacing optical fibers, are “recessed” below the surface of the silicon. Optical fibers can be recessed below the surface of the silicon substrate such that a precisely controlled portion of the cladding layer extending above the silicon surface can be removed (lapped). With the cladding layer removed, the separation between the fiber core(s) and optoelectronic device(s) can be reduced resulting in improved optical coupling when the optical fiber silicon array is connected to, e.g., a VCSEL array.Type: GrantFiled: April 1, 2005Date of Patent: October 3, 2006Assignee: International Business Machines CorporationInventors: Evan George Colgan, Fuad Elias Doany, Bruce Kenneth Furman, Daniel J. Stigliani, Jr.
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Patent number: 7095474Abstract: Electronic devices having patterned electrically conductive polymers providing electrical connection thereto and methods of fabrication thereof are described. Liquid crystal display cells are described having at least one of the electrodes providing a bias across the liquid crystal material formed from a patterned electrically conductive polymer. Thin film transistors having patterned electrically conductive polymers as source drain and gate electrodes are described. Light emitting diodes having anode and coated regions formed from patterned electrically conductive polymers are described. Methods of patterning using a resist mask; patterning using a patterned metal layer; patterning the metal layer using a resist; and patterning the electrically conductive polymer directly to form electrodes and anode and cathode regions are described.Type: GrantFiled: October 19, 2001Date of Patent: August 22, 2006Assignee: International Business Machines CorporationInventors: Marie Angelopoulos, Christos Dimitrios Dimitrakopoulos, Bruce Kenneth Furman, Teresita Ordonez Graham, Shui-Chih Alan Lien
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Patent number: 7030481Abstract: A carrier for a semiconductor component is provided having passive components integrated in its substrate. The passive components include decoupling components, such as capacitors and resistors. A set of connections is integrated to provide a close electrical proximity to the supported components.Type: GrantFiled: December 9, 2002Date of Patent: April 18, 2006Assignee: Internation Business Machines CorporationInventors: Michael Patrick Chudzik, Robert H. Dennard, Rama Divakaruni, Bruce Kenneth Furman, Rajarao Jammy, Chandrasekhar Narayan, Sampath Purushothaman, Joseph F. Shepard, Jr., Anna Wanda Topol
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Patent number: 6962872Abstract: A carrier for a semiconductor component is provided having passive components integrated in its substrate. The passive components include decoupling components, such as capacitors and resistors. A set of connections is integrated to provide a close electrical proximity to the supported components.Type: GrantFiled: August 31, 2004Date of Patent: November 8, 2005Assignee: International Business Machines CorporationInventors: Michael Patrick Chudzik, Robert H. Dennard, Rama Divakaruni, Bruce Kenneth Furman, Rajarao Jammy, Chandrasekhar Narayan, Sampath Purushothaman, Joseph F. Shepard, Jr., Anna Wanda Topol
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Patent number: 6874950Abstract: Optical devices, components and methods for mounting optical fibers and for side-coupling light to/from optical fibers using a modified silicon V-groove, or silicon V-groove array, wherein V-grooves, which are designed for precisely aligning/spacing optical fibers, are “recessed” below the surface of the silicon. Optical fibers can be recessed below the surface of the silicon substrate such that a precisely controlled portion of the cladding layer extending above the silicon surface can be removed (lapped). With the cladding layer removed, the separation between the fiber core(s) and optoelectronic device(s) can be reduced resulting in improved optical coupling when the optical fiber silicon array is connected to, e.g., a VCSEL array.Type: GrantFiled: December 17, 2002Date of Patent: April 5, 2005Assignee: International Business Machines CorporationInventors: Evan George Colgan, Fuad Elias Doany, Bruce Kenneth Furman, Daniel J. Stigliani, Jr.
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Publication number: 20050023664Abstract: A carrier for a semiconductor component is provided having passive components integrated in its substrate. The passive components include decoupling components, such as capacitors and resistors. A set of connections is integrated to provide a close electrical proximity to the supported components.Type: ApplicationFiled: August 31, 2004Publication date: February 3, 2005Inventors: Michael Chudzik, Robert Dennard, Rama Divakaruni, Bruce Kenneth Furman, Rajarao Jammy, Chandrasekhar Narayan, Sampath Purushothaman, Joseph Shepard, Anna Wanda Topol
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Publication number: 20040114859Abstract: Optical devices, components and methods for mounting optical fibers and for side-coupling light to/from optical fibers using a modified silicon V-groove, or silicon V-groove array, wherein V-grooves, which are designed for precisely aligning/spacing optical fibers, are “recessed” below the surface of the silicon. Optical fibers can be recessed below the surface of the silicon substrate such that a precisely controlled portion of the cladding layer extending above the silicon surface can be removed (lapped). With the cladding layer removed, the separation between the fiber core(s) and optoelectronic device(s) can be reduced resulting in improved optical coupling when the optical fiber silicon array is connected to, e.g., a VCSEL array.Type: ApplicationFiled: December 17, 2002Publication date: June 17, 2004Applicant: International Business Machines CorporationInventors: Evan George Colgan, Fuad Elias Doany, Bruce Kenneth Furman, Daniel J. Stigliani
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Publication number: 20040108587Abstract: A carrier for a semiconductor component is provided having passive components integrated in its substrate. The passive components include decoupling components, such as capacitors and resistors. A set of connections is integrated to provide a close electrical proximity to the supported components.Type: ApplicationFiled: December 9, 2002Publication date: June 10, 2004Inventors: Michael Patrick Chudzik, Robert H. Dennard, Rama Divakaruni, Bruce Kenneth Furman, Rajarao Jammy, Chandrasekhar Narayan, Sampath Purushothaman, Joseph F. Shepard, Anna Wanda Topol
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Patent number: 6732908Abstract: A microjoint interconnect structure comprising a dense array of metallic studs of precisely controllable height tipped with a joining metallurgy. The array is produced on a device chip that is to be attached to a carrier, or to a carrier along with other devices, some of which may be selected to have similar interconnect structures so as to form all together an assembled carrier that functions as a complete computing, communications or networking system.Type: GrantFiled: January 18, 2002Date of Patent: May 11, 2004Assignee: International Business Machines CorporationInventors: Bruce Kenneth Furman, Maheswaran Surendra, Sherif A. Goma, Simon M. Karecki, John Harold Magerlein, Kevin Shawn Petrarca, Sampath Purushothaman, Carlos Juan Sambucetti, Richard Paul Volant, George Frederick Walker
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Patent number: 6697037Abstract: A matrix addressed display system designed so as to enable data line repair by electronic mechanisms which is efficient and low in cost and thus increases yield. Such active data line repair utilizes additional data driver outputs, a defect map memory in the TFT/LCD module and modification of the data stream to the data drivers by additional circuits between the display and the display adapter. A bus configuration on the display substrate is utilized which combines repair flexibility, low parasitic capacitance, and the ability to easily make the necessary interconnections. The number of interconnections is kept to a minimum, the connections are reliable, and the connections may be made with conventional wire bond or laser bond technology, or disk bond technology.Type: GrantFiled: April 29, 1996Date of Patent: February 24, 2004Assignee: International Business Machines CorporationInventors: Paul Matthew Alt, Pedro A. Chalco, Bruce Kenneth Furman, Raymond Robert Horton, Chandrasekhar Narayan, Benal Lee Owens, Jr., Kevin Wilson Warren, Steven Lorenz Wright
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Publication number: 20030136814Abstract: A microjoint interconnect structure comprising a dense array of metallic studs of precisely controllable height tipped with a joining metallurgy. The array is produced on a device chip that is to be attached to a carrier, or to a carrier along with other devices, some of which may be selected to have similar interconnect structures so as to form all together an assembled carrier that functions as a complete computing, communications or networking system.Type: ApplicationFiled: January 18, 2002Publication date: July 24, 2003Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruce Kenneth Furman, Maheswaran Surendra, Sherif A. Goma, Simon M. Karecki, John Harold Magerlein, Kevin Shawn Petrarca, Sampath Purushothaman, Carlos Juan Sambucetti, Richard Paul Volant, George Frederick Walker, Anna Karecki
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Publication number: 20020025391Abstract: Electronic devices having patterned electrically conductive polymers providing electrical connection thereto and methods of fabrication thereof are described. Liquid crystal display cells are described having at least one of the electrodes providing a bias across the liquid crystal material formed from a patterned electrically conductive polymer. Thin film transistors having patterned electrically conductive polymers as source drain and gate electrodes are described. Light emitting diodes having anode and coated regions formed from patterned electrically conductive polymers are described. Methods of patterning using a resist mask; patterning using a patterned metal layer; patterning the metal layer using a resist; and patterning the electrically conductive polymer directly to form electrodes and anode and cathode regions are described.Type: ApplicationFiled: October 19, 2001Publication date: February 28, 2002Inventors: Marie Angelopoulos, Christos Dimitrios Dimitrakopoulos, Bruce Kenneth Furman, Teresita Ordonez Graham, Shui-Chih Alan Lien
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Patent number: 6331356Abstract: Electronic devices having patterned electrically conductive polymers providing electrical connection thereto and methods of fabrication thereof are described. Liquid crystal display cells are described having at least one of the electrodes providing a bias across the liquid crystal material formed from a patterned electrically conductive polymer. Thin film transistors having patterned electrically conductive polymers as source drain and gate electrodes are described. Light emitting diodes having anode and coated regions formed from patterned electrically conductive polymers are described. Methods of patterning using a resist mask; patterning using a patterned metal layer; patterning the metal layer using a resist; and patterning the electrically conductive polymer directly to form electrodes and anode and cathode regions are described.Type: GrantFiled: July 9, 1998Date of Patent: December 18, 2001Assignee: International Business Machines CorporationInventors: Marie Angelopoulos, Christos Dimitrios Dimitrakopoulos, Bruce Kenneth Furman, Teresita Ordonez Graham, Shui-Chih Alan Lien
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Patent number: 6029881Abstract: A principle of surface interlocking wherein the imperfections of two parallel surfaces deform and interlock under pressure. The surface interlocking enables the combination of a bridging element and a bonding tip of a diffusion bonding apparatus to pick up, transport, position at a unique location, and bond the bridging element in place to the conductors or pads. In the invention a single point bonding tip as part of a bonding apparatus is used to pick up the, to be, bridging metal object transport it to the bonding site and perform the entire bridging bonding operation all in one sequence of steps.Type: GrantFiled: February 6, 1997Date of Patent: February 29, 2000Assignee: International Business Machines CorporationInventors: Pedro A. Chalco, Bruce Kenneth Furman, Raymond Robert Horton, Chandrasekhar Narayan