Patents by Inventor Bruce M. Thompson

Bruce M. Thompson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096896
    Abstract: Non-planar integrated circuit structures having mitigated source or drain etch from replacement gate process are described. For example, an integrated circuit structure includes a fin or nanowire. A gate stack is over the fin or nanowire. The gate stack includes a gate dielectric and a gate electrode. A first dielectric spacer is along a first side of the gate stack, and a second dielectric spacer is along a second side of the gate stack. The first and second dielectric spacers are over at least a portion of the fin or nanowire. An insulating material is vertically between and in contact with the portion of the fin or nanowire and the first and second dielectric spacers. A first epitaxial source or drain structure is at the first side of the gate stack, and a second epitaxial source or drain structure is at the second side of the gate stack.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Jun Sung KANG, Kai Loon CHEONG, Erica J. THOMPSON, Biswajeet GUHA, William HSU, Dax M. CRUM, Tahir GHANI, Bruce BEATTIE
  • Publication number: 20090248589
    Abstract: An automated method of managing or constructing a portfolio comprising at least one financial instrument defining portfolio attributes, the method using a system comprising a processor, a display and an input device. The method comprises defining at least one objective representing a desired state for the portfolio attributes and defining a set of constraints that are defined in relation to a computable, desired state of portfolio attributes in relation to the at least one objective. A constraints analysis module based upon the set of constraints is generated and provided to the processor. The portfolio is evaluated with the processor using the constraints analysis module and the state of the portfolio attributes based upon the evaluation is displayed. At least one option for altering portfolio attributes in order to more effectively meet the at least one objective is simultaneously displayed.
    Type: Application
    Filed: June 10, 2009
    Publication date: October 1, 2009
    Applicant: PERSPECTIVE PARTNERS, LLC
    Inventors: David L. Snyder, Jeremy M. Waterman, Bruce M. Thompson, Anthony M. Vito, Bhaskaran Balakrishnan
  • Patent number: 7471156
    Abstract: An apparatus and method for eliminating unwanted signal power dissipation in balanced amplifier circuits and for prohibiting unwanted signal power from appearing at the balanced amplifier load is presented. Load impedances to the amplifier power output transistors are maintained very low at unwanted frequencies, and are at an operational impedance level at the fundamental frequency. An impedance network control concept is presented, which may be either manually or automatically implemented.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: December 30, 2008
    Assignee: Motorola, Inc
    Inventors: Bruce M. Thompson, Robert E. Stengel
  • Publication number: 20080079496
    Abstract: An apparatus and method for eliminating unwanted signal power dissipation in balanced amplifier circuits and for prohibiting unwanted signal power from appearing at the balanced amplifier load is presented. Load impedances to the amplifier power output transistors are maintained very low at unwanted frequencies, and are at an operational impedance level at the fundamental frequency. An impedance network control concept is presented, which may be either manually or automatically implemented.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Applicant: MOTOROLA, INC.
    Inventors: Bruce M. Thompson, Robert E. Stengel
  • Patent number: 7233207
    Abstract: A system and a method for providing an input to a distributed power amplifying system are provided. In an embodiment, a distributed power amplifying system includes a plurality of amplifying sections (102, 104, 106, and 108) and a plurality of drivers (110, 112, 114, and 116). Each of the plurality of drivers receives a common transmit signal (118) and an individual control signal (120, 122, 124, and 126). Each of the plurality of drivers independently preconditions the common transmit signal, to provide a transmit output signal (128, 130, 132, and 134) to each of the plurality of amplifying sections. The common transmit signal provided to each of the plurality of drivers is preconditioned, based on the individual control signal.
    Type: Grant
    Filed: May 6, 2005
    Date of Patent: June 19, 2007
    Assignee: Motorola, Inc.
    Inventors: Bruce M. Thompson, Robert E. Stengel
  • Patent number: 6819181
    Abstract: A structure and method for the improvement of interference isolation using distributed broadband technology. This structure uses signal processing across a distributed network in order to optimize the isolation of a signal of interest when noise, interference and crosstalk signal sources are present. The structure is designed so that a signal arrives at a node in the network via more than one path and is summed in a correlated or in-phase manner. Each signal path is designed so that the signal phase may be modulated to create the in-phase summing. Noise sources that arrive at the network node are added in an uncorrelated or out-of-phase manner. Therefore, the combination of the signal adding coherently and the interference adding with an uncorrelated phase improves the signal to interference ratio. This type of structure may be applied in an RF power amplifier application in order to provide an improved interference or crosstalk signal ratio.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: November 16, 2004
    Assignee: Motorola, Inc.
    Inventors: Robert E. Stengel, Bruce M. Thompson
  • Publication number: 20040056689
    Abstract: A structure and method for the improvement of interference isolation using distributed broadband technology. This structure uses signal processing across a distributed network in order to optimize the isolation of a signal of interest when noise, interference and crosstalk signal sources are present. The structure is designed so that a signal arrives at a node in the network via more than one path and is summed in a correlated or in-phase manner. Each signal path is designed so that the signal phase may be modulated to create the in-phase summing. Noise sources that arrive at the network node are added in an uncorrelated or out-of-phase manner. Therefore, the combination of the signal adding coherently and the interference adding with an uncorrelated phase improves the signal to interference ratio. This type of structure may be applied in an RF power amplifier application in order to provide an improved interference or crosstalk signal ratio.
    Type: Application
    Filed: December 21, 2001
    Publication date: March 25, 2004
    Inventors: Robert E. Stengel, Bruce M. Thompson