Patents by Inventor Bruce McArthur

Bruce McArthur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220343934
    Abstract: The technology disclosed herein enables compensation for attenuation caused by face coverings in captured audio. In a particular embodiment, a method includes determining that a face covering is positioned to cover the mouth of a user of a user system. The method further includes receiving audio that includes speech from the user and adjusting amplitudes of frequencies in the audio to compensate for the face covering.
    Type: Application
    Filed: April 26, 2021
    Publication date: October 27, 2022
    Inventors: John C. Lynch, Miguel De Araujo, Gurbinder Singh Kalkat, Eugene Pung-Gin Yee, Christopher Bruce McArthur
  • Patent number: 7871004
    Abstract: A wafer stage overlay error map is created using standard overlay targets and a special numerical algorithm. A reticle including a 2-dimensional array of standard overlay targets is exposed several times onto a photoresist coated silicon wafer using a photolithographic exposure tool. After exposure, the overlay targets are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is then supplied to a software program that generates a 2-dimensional wafer stage distortion and yaw overlay error map.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: January 18, 2011
    Assignee: Litel Instruments
    Inventors: Adlai Smith, Bruce McArthur, Robert Hunter, Jr.
  • Publication number: 20070279607
    Abstract: A wafer stage overlay error map is created using standard overlay targets and a special numerical algorithm. A reticle including a 2-dimensional array of standard overlay targets is exposed several times onto a photoresist coated silicon wafer using a photolithographic exposure tool. After exposure, the overlay targets are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is then supplied to a software program that generates a 2-dimensional wafer stage distortion and yaw overlay error map.
    Type: Application
    Filed: August 15, 2007
    Publication date: December 6, 2007
    Inventors: Adlai Smith, Bruce McArthur, Robert Hunter
  • Patent number: 7271905
    Abstract: A wafer stage overlay error map is created using standard overlay targets and a special numerical algorithm. A reticle including a 2-dimensional array of standard overlay targets is exposed several times onto a photoresist coated silicon wafer using a photolithographic exposure tool. After exposure, the overlay targets are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is then supplied to a software program that generates a 2-dimensional wafer stage distortion and yaw overlay error map.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: September 18, 2007
    Assignee: Litel Instruments
    Inventors: Adlai Smith, Bruce McArthur, Robert Hunter, Jr.
  • Patent number: 7160657
    Abstract: An apparatus and method for manufacturing and using a calibrated registration reference wafer in a semiconductor manufacturing facility. A reference reticle consisting of a 2-dimensional array of standard alignment attributes is exposed several times onto a photoresist coated semiconductor wafer using a photolithographic exposure tool. After the final steps of the lithographic development process the resist patterned wafer is physically etched using standard techniques to create a permanent record of the alignment attribute exposure pattern. The permanently recorded alignment attributes are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is used to generate a calibration file that contains the positions of the alignment attributes on the reference wafer. The reference wafer and calibration file can be used to determine the wafer stage registration performance for any photolithographic exposure tool.
    Type: Grant
    Filed: January 26, 2004
    Date of Patent: January 9, 2007
    Assignee: Litel Instruments
    Inventors: Adlai Smith, Bruce McArthur, Robert Hunter, Jr.
  • Publication number: 20060209276
    Abstract: Intra-field distortion for a projection imaging tool is determined using a self-referenced rectangular grid reticle pattern, that includes at least two arrays of alignment attributes that are complementary to each other, is exposed multiple times onto a substrate with a recording media. A reference reticle pattern is exposed onto the substrate, wherein the reference reticle pattern overlaps the grid alignment attributes thereby creating completed grid alignment attributes. Positional offsets of the completed alignment attributes and completed grid alignment attributes are measured and an intra-field distortion from the offsets is determined.
    Type: Application
    Filed: April 6, 2006
    Publication date: September 21, 2006
    Inventors: Adlai Smith, Robert Hunter, Bruce McArthur
  • Patent number: 7099011
    Abstract: A projection lens distortion error map is created using overlay targets and a special numerical algorithm. A reticle including an array of overlay targets is exposed several times onto a photoresist coated silicon wafer using a photolithographic stepper. After exposure, the overlay targets are measured for placement error. The resulting overlay error data is then supplied to a software program that generates a lens distortion error map for the photolithographic projection system.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: August 29, 2006
    Assignee: Litel Instruments
    Inventors: Bruce McArthur, Adlai Smith, Robert Hunter, Jr.
  • Patent number: 7088427
    Abstract: An in-situ apparatus for high resolution imaging in lithographic steppers and scanners (machines) is described. It comprises a multiple field in-situ imaging objective that images the source directly onto the machine reticle or objective plane. The image on the wafer side of the machine is then recorded electronically or in photo resist. Alternative embodiments create source images at locations before or beyond the wafer plane that can be more conveniently recorded with sensors embedded in the wafer stage chuck.
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: August 8, 2006
    Assignee: Litel Instruments
    Inventors: Adlai H. Smith, Robert O. Hunter, Jr., Bruce McArthur
  • Publication number: 20060109438
    Abstract: A reticle stage grid and yaw in a projection imaging tool is determined by exposing a first portion of a reticle pattern onto a substrate with a recording media thereby producing a first exposure. The first portion of the reticle pattern includes at least two arrays of alignment attribute that have features complementary to each other. The reticle stage is then shifted and a second portion of the reticle pattern is exposed. The first and second exposures overlap and interlock to create completed alignment attributes. Measurements of positional offsets of the completed alignment attributes are used to determine the reticle stage grid and yaw.
    Type: Application
    Filed: November 28, 2005
    Publication date: May 25, 2006
    Inventors: Adlai Smith, Robert Hunter, Bruce McArthur
  • Publication number: 20060042106
    Abstract: A method and apparatus for front to back substrate registration is described. Alignment characteristics of features on surfaces of substrates can be used to physically align substrates with a multiplicity of integrated alignment optics. Measurement of offsets of the integral alignment optics are used to compute registration data for use in calibration of the substrate global alignment.
    Type: Application
    Filed: August 24, 2004
    Publication date: March 2, 2006
    Inventors: Adlai Smith, Robert Hunter, Bruce McArthur, Thomas Khuu, Yuji Yamaguchi
  • Publication number: 20060007431
    Abstract: Techniques for determining wafer stage grid and yaw in a projection imaging tool are described. The techniques include exposing an overlay reticle onto a substrate having a recording media, thereby creating a plurality of printed fields on the substrate. The overlay reticle is then positioned such that when the reticle is exposed again completed alignment attributes are created in at least two sites in a first and a second printed field. The substrate is then rotated relative to the reticle by a desired amount. The overlay reticle is then positioned such that when the reticle is again exposed, completed alignment attributes are created in at least two sites in the first and a third printed field. Measurements of the complementary alignment attribute and a dynamic intra-field lens distortion are then used to reconstruct wafer stage grid and yaw error of the projection imaging system.
    Type: Application
    Filed: August 11, 2005
    Publication date: January 12, 2006
    Inventors: Adlai Smith, Robert Hunter, Bruce McArthur
  • Publication number: 20050231705
    Abstract: An in-situ apparatus for high resolution imaging in lithographic steppers and scanners (machines) is described. It comprises a multiple field in-situ imaging objective that images the source directly onto the machine reticle or objective plane. The image on the wafer side of the machine is then recorded electronically or in photo resist. Alternative embodiments create source images at locations before or beyond the wafer plane that can be more conveniently recorded with sensors embedded in the wafer stage chuck.
    Type: Application
    Filed: April 20, 2004
    Publication date: October 20, 2005
    Inventors: Adlai Smith, Robert Hunter, Bruce McArthur
  • Publication number: 20050117154
    Abstract: A projection lens distortion error map is created using overlay targets and a special numerical algorithm. A reticle including an array of overlay targets is exposed several times onto a photoresist coated silicon wafer using a photolithographic stepper. After exposure, the overlay targets are measured for placement error. The resulting overlay error data is then supplied to a software program that generates a lens distortion error map for the photolithographic projection system.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 2, 2005
    Inventors: Bruce McArthur, Adlai Smith, Robert Hunter
  • Patent number: 6899982
    Abstract: A photomask or reticle including a unique set of alignment attributes at separate and distinguishable field points is put in the reticle plane of a photolithographic projection system. The reticle pattern is exposed onto a resist coated wafer or substrate and processed through the final few steps of the photolithographic process. The resulting array of alignment attributes are then measured using a standard optical overlay metrology tool. The overlay tool is driven by a set of software instructions. By comparing the resulting overlay data to the placement error encoded on the reticle it can determined if the data has been read or displayed in the correct order.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: May 31, 2005
    Assignee: Litel Instruments
    Inventors: Bruce McArthur, Adlai Smith
  • Patent number: 6833221
    Abstract: A photomask or reticle including a unique set of alignment attributes at separate and distinguishable field points is put in the reticle plane of a photolithographic projection system. The reticle pattern is exposed onto a resist coated wafer or substrate and processed through the final few steps of the photolithographic process. The resulting array of alignment attributes are then measured using a standard optical overlay metrology tool. The overlay tool is driven by a set of software instructions. By comparing the resulting overlay data to the placement error encoded on the reticle it can determined if the data has been read or displayed in the correct order.
    Type: Grant
    Filed: January 4, 2002
    Date of Patent: December 21, 2004
    Assignee: Litel Instruments
    Inventors: Bruce McArthur, Adlai Smith
  • Publication number: 20040197678
    Abstract: A photomask or reticle including a unique set of alignment attributes at separate and distinguishable field points is put in the reticle plane of a photolithographic projection system. The reticle pattern is exposed onto a resist coated wafer or substrate and processed through the final few steps of the photolithographic process. The resulting array of alignment attributes are then measured using a standard optical overlay metrology tool. The overlay tool is driven by a set of software instructions. By comparing the resulting overlay data to the placement error encoded on the reticle it can determined if the data has been read or displayed in the correct order.
    Type: Application
    Filed: March 5, 2004
    Publication date: October 7, 2004
    Inventors: Bruce McArthur, Adlai Smith
  • Publication number: 20040162687
    Abstract: A wafer stage overlay error map is created using standard overlay targets and a special numerical algorithm. A reticle including a 2-dimensional array of standard overlay targets is exposed several times onto a photoresist coated silicon wafer using a photolithographic exposure tool. After exposure, the overlay targets are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is then supplied to a software program that generates a 2-dimensional wafer stage distortion and yaw overlay error map.
    Type: Application
    Filed: February 9, 2004
    Publication date: August 19, 2004
    Inventors: Adlai Smith, Bruce McArthur, Robert Hunter
  • Publication number: 20040157142
    Abstract: An apparatus and method for manufacturing and using a calibrated registration reference wafer in a semiconductor manufacturing facility. A reference reticle consisting of a 2-dimensional array of standard alignment attributes is exposed several times onto a photoresist coated semiconductor wafer using a photolithographic exposure tool. After the final steps of the lithographic development process the resist patterned wafer is physically etched using standard techniques to create a permanent record of the alignment attribute exposure pattern. The permanently recorded alignment attributes are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is used to generate a calibration file that contains the positions of the alignment attributes on the reference wafer. The reference wafer and calibration file can be used to determine the wafer stage registration performance for any photolithographic exposure tool.
    Type: Application
    Filed: January 26, 2004
    Publication date: August 12, 2004
    Inventors: Adlai Smith, Bruce McArthur, Robert Hunter
  • Patent number: 6734971
    Abstract: A wafer stage overlay error map is created using standard overlay targets and a special numerical algorithm. A reticle including a 2-dimensional array of standard overlay targets is exposed several times onto a photoresist coated silicon wafer using a photolithographic exposure tool. After exposure, the overlay targets are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is then supplied to a software program that generates a 2-dimensional wafer stage distortion and yaw overlay error map.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: May 11, 2004
    Assignee: Lael Instruments
    Inventors: Adlai Smith, Bruce McArthur, Robert Hunter, Jr.
  • Patent number: 6699627
    Abstract: An apparatus and method for manufacturing and using a calibrated registration reference wafer in a semiconductor manufacturing facility. A reference reticle consisting of a 2-dimensional array of standard alignment attributes is exposed several times onto a photoresist coated semiconductor wafer using a photolithographic exposure tool. After the final steps of the lithographic development process the resist patterned wafer is physically etched using standard techniques to create a permanent record of the alignment attribute exposure pattern. The permanently recorded alignment attributes are measured for placement error using a conventional overlay metrology tool. The resulting overlay error data is used to generate a calibration file that contains the positions of the alignment attributes on the reference wafer. The reference wafer and calibration file can be used to determine the wafer stage registration performance for any photolithographic exposure tool.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: March 2, 2004
    Inventors: Adlai Smith, Bruce McArthur, Robert Hunter, Jr.