Abstract: Peripheral Component Interconnect (PCI) device contains Host Messaging Unit (HMU) which is operative to off load host processor and PCI device processor from PCI bus transfer overhead. HMU is configurable to asynchronously retrieve host processor commands from circular buffer, either by using polling or interrupt service techniques. Both host command retrieval methods are operable to remove host processor and PCI device processor from direct PCI bus command transactions, thereby increasing the efficiency of both processors. Interrupt service control of HMU is operative to buffer multiple service requests from PCI device processor, so that a more efficient use of the host processor interrupt service routine is implemented, providing for multiple service requests to be serviced in a single interrupt service request.

Abstract: Peripheral Component Interconnect (PCI) device contains Host Messaging Unit (HMU) which is operative to off load host processor and PCI device processor from PCI bus transfer overhead. HMU is configurable to asynchronously retrieve host processor commands from circular buffer, either by using polling or interrupt service techniques. Both host command retrieval methods are operable to remove host processor and PCI device processor from direct PCI bus command transactions, thereby increasing the efficiency of both processors. Interrupt service control of HMU is operative to buffer multiple service requests from PCI device processor, so that a more efficient use of the host processor interrupt service routine is implemented, providing for multiple service requests to be serviced in a single interrupt service request.

Abstract: Peripheral Component Interconnect (PCI) device contains Host Messaging Unit (HMU) which is operative to off load host processor and PCI device processor from PCI bus transfer overhead. HMU is configurable to asynchronously retrieve host processor commands from circular buffer, either by using polling or interrupt service techniques. Both host command retrieval methods are operable to remove host processor and PCI device processor from direct PCI bus command transactions, thereby increasing the efficiency of both processors. Interrupt service control of HMU is operative to buffer multiple service requests from PCI device processor, so that a more efficient use of the host processor interrupt service routine is implemented, providing for multiple service requests to be serviced in a single interrupt service request.

Abstract: Peripheral Component Interconnect (PCI) device contains Host Messaging Unit (HMU) which is operative to off load host processor and PCI device processor from PCI bus transfer overhead. HMU is configurable to asynchronously retrieve host processor commands from circular buffer, either by using polling or interrupt service techniques. Both host command retrieval methods are operable to remove host processor and PCI device processor from direct PCI bus command transactions, thereby increasing the efficiency of both processors. Interrupt service control of HMU is operative to buffer multiple service requests from PCI device processor, so that a more efficient use of the host processor interrupt service routine is implemented, providing for multiple service requests to be serviced in a single interrupt service request.

Abstract: An apparatus for providing identification information to a peripheral device connected to a data processing system via a parallel communications interface cable. The apparatus includes a cable connector for connecting to a cable coupled to the data processing system and a peripheral device connector for connecting to the peripheral device. The cable connector and the peripheral device connector are coupled together to provide communication between the data processing system and the peripheral device. The apparatus also includes means for providing identification information to the connected peripheral device. Such identification information is utilized by the peripheral device to set a device identifier. In one embodiment, device identifiers are set utilizing identification information selected in conjunction with the physical location of the peripheral device.