Patents by Inventor Bruce Michael Gilbert

Bruce Michael Gilbert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6636944
    Abstract: An associative cache and method for replacing data entries in the associative cache by marking input-output (IO) device entries with an IO state. The IO state of a data entry may be indicated by a status or state tag. When valid data entries in a cache must be replaced to make way for new data, entries marked with an IO state are replaced first. This order of replacement improves the cache hit rate by non-IO agents such as data processors by preserving their data entries in the cache. If no valid data entries in the associative cache are marked with an IO state, the method reverts to conventional replacement algorithms such as random or least-recently-used (LRU) to determine which data will be replaced.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: October 21, 2003
    Assignee: International Business Machines Corporation
    Inventors: Bruce Michael Gilbert, Robert J. Joersz, Roger L. Shelton
  • Patent number: 6041376
    Abstract: A multiprocessor system that assures forward progress of local processor requests for data by preventing other nodes from accessing the data until the processor request is satisfied. In one aspect of the invention, the local processor requests data through a remote cache interconnect. The remote cache interconnect tells the local processor to retry its request for data at a later time, so that the remote cache interconnect has sufficient time to obtain the data from the system interconnect. When the remote cache interconnect receives the data from the system interconnect, a hold flag is set. Any requests from other nodes for the data are rejected while the hold flag is set. When the local processor issues a retry request, the data is delivered to the processor and the hold flag is cleared. Other nodes may then obtain control of the data.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: March 21, 2000
    Assignee: Sequent Computer Systems, Inc.
    Inventors: Bruce Michael Gilbert, Robert T. Joersz, Thomas D. Lovett, Robert J. Safranek