Abstract: An event based test system for testing an IC device under test (DUT) designed under an automatic electronic design (EDA) environment. The event based test system includes an event memory for storing event data derived directly from simulation of design data for an intended IC in the EDA environment where the event data to denote each event is formed with time index indicating a time length from a predetermined point and an event type indicating a type of change at an event, an event generation unit for generating test vectors based on the event data where waveform of each vector is determined by the event type and a timing of the waveform is determined by accumulating the time index of previous events, and means for supplying test vectors to the DUT and evaluating response outputs of the DUT at predetermined timings.

Abstract: A method of converting test vectors in an original cycle based test language into a target cycle based test language, by forming a set of templates depicting waveforms defined in the target test language, decomposing a waveform in the original test language into a set of constituent events where each event includes data showing at least a starting value and a number of subsequent edges of the waveform, comparing the template and the set of constituent events at different levels of abstraction determined in advance, in the order of a signal level, a wave kind level where the signal is configured by a plurality of wave kinds, and a character level where the wave kind is configured by a plurality of characters, and storing the waveform data in the target test language when a match is detected and retrieving corresponding parameters of the waveform in the original test language.

Abstract: An event based test system for testing an IC device under test (DUT) designed under an automatic electronic design (EDA) environment. The event based test system includes an event memory for storing event data derived directly from simulation of design data for an intended IC in the EDA environment wherein the event data to denote each event is formed with time index indicating a time length from a predetermined point and an event type indicating a type of change at an event, an event generation unit for generating test vectors based on the event data from the event memory where waveform of each vector is determined by the event type and a timing of the waveform is determined by accumulating the time index of previous events, and means for supplying test vectors to the DUT and evaluating response outputs of the DUT at predetermined timings.