Patents by Inventor Bruce W. Offord

Bruce W. Offord has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7906401
    Abstract: A method of tuning threshold voltages of interdiffusible structures. The method includes a step of situating an interdiffusible structure in a path of a laser and a step of illuminating the interdiffusible structure with laser energy until a desired threshold voltage is obtained.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: March 15, 2011
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Ryan P. Lu, Ayax D. Ramirez, Bruce W. Offord, Stephen D. Russell
  • Patent number: 7466369
    Abstract: A portable micro-display projector uses a light transmissive liquid crystal display system wherein light is projected co-linearly from a light source through, and is selectively altered by, a transmissive liquid crystal display or liquid crystal light valve of the light transmissive liquid crystal display system.
    Type: Grant
    Filed: December 12, 2006
    Date of Patent: December 16, 2008
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Bruce W. Offord, Stephen D. Russell, Randy L. Shimabukuro
  • Patent number: 7253869
    Abstract: A liquid crystal display includes: a) a sapphire substrate; b) a single crystal silicon structure disposed on the sapphire substrate to create a silicon-on-sapphire structure; c) a plurality of liquid crystal capacitors disposed on the silicon-on-sapphire structure; d) integrated self-aligned circuitry formed from the crystal silicon structure, where the circuitry modulates the liquid crystal capacitors such that a video image is generated; and e) an integrated audio transducer disposed on the silicon-on-sapphire structure for generating an audible signal.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: August 7, 2007
    Assignee: United States of America as represented by the Secretary of the Navy
    Inventors: Stephen D. Russell, Randy L. Shimabukuro, Bruce W. Offord
  • Patent number: 7153749
    Abstract: A method of tuning threshold voltages of interdiffusible structures. The method includes a step of situating a interdiffusible structure in a path of a laser and a step of illuminating the interdiffusible structure with laser energy until a desired threshold voltage is obtained.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: December 26, 2006
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Ryan P. Lu, Ayax D. Ramirez, Bruce W. Offord, Stephen D. Russell
  • Patent number: 6954236
    Abstract: A liquid crystal display includes: a) a sapphire substrate; b) a single crystal silicon structure disposed on the sapphire substrate to create a silicon-on-sapphire structure; c) a plurality of liquid crystal capacitors disposed on the silicon-on-sapphire structure; d) integrated self-aligned circuitry formed from the crystal silicon structure, where the circuitry modulates the liquid crystal capacitors in response to an input control signal; and e) a receiver disposed on the silicon-on-sapphire structure for receiving electromagnetic radiation and generating the input control signal responsive to the received electromagnetic radiation.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: October 11, 2005
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Stephen D. Russell, Randy L. Shimabukuro, Bruce W. Offord
  • Patent number: 6954235
    Abstract: A liquid crystal display includes: a) a sapphire substrate having a first crystal lattice structure; b) a single crystal silicon structure having a thickness no greater than about 100 nanometers affixed to the sapphire substrate to create a silicon-on-sapphire structure, and a second crystal lattice structure oriented by the first crystal lattice structure; c) an array of liquid crystal capacitors formed on the silicon-on-sapphire structure; and d) integrated self-aligned circuitry formed from the silicon layer which is operably coupled to modulate the liquid crystal capacitors. The liquid crystals capacitors may include nematic or ferroelectric liquid crystal material.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: October 11, 2005
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Stephen D. Russell, Randy L. Shimabukuro, Bruce W. Offord
  • Patent number: 6617187
    Abstract: A method for fabricating a monolithically integrated liquid crystal array display and control circuitry on a silicon-on-sapphire structure comprises the steps of: a) forming an epitaxial silicon layer on a sapphire substrate to create a silicon-on-sapphire structure; b) ion implanting the epitaxial silicon layer; c) annealing the silicon-on sapphire structure; d) oxidizing the epitaxial silicon layer to form a silicon dioxide layer from portion of the epitaxial silicon layer so that a thinned epitaxial silicon layer remains; e) removing the silicon dioxide layer to expose the thinned epitaxial silicon layer; f) fabricating an array of pixels from the thinned epitaxial silicon layer; and g) fabricating integrated circuitry from the thinned epitaxial silicon layer which is operably coupled to modulate the pixels. The thinned epitaxial silicon supports the fabrication of device quality circuitry which is used to control the operation of the pixels.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: September 9, 2003
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Randy L. Shimabukuro, Stephen D. Russell, Bruce W. Offord
  • Patent number: 6521950
    Abstract: A liquid crystal display includes: a) a sapphire substrate having a first crystal lattice structure; b) a single crystal silicon structure having a thickness no greater than about 100 nanometers affixed to the sapphire substrate to create a silicon-on-sapphire structure, and a second crystal lattice structure oriented by the first crystal lattice structure; c) an array of liquid crystal capacitors formed on the silicon-on-sapphire structure; and d) integrated circuitry formed from the silicon layer which is operably coupled to modulate the liquid crystal capacitors. The liquid crystals capacitors may include nematic or ferroelectric liquid crystal material.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: February 18, 2003
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Randy L. Shimabukuro, Stephen D. Russell, Bruce W. Offord
  • Patent number: 6372592
    Abstract: A method for making a self-aligned FET with an electrically active mask comprises the steps of forming a semiconductor layer on an insulating substrate, forming an electrically nonconductive oxide layer on the semiconductor layer, forming an electrically conductive metal layer on the oxide layer, patterning the metal layer and the oxide layer to form an electrically active gate on semiconductor layer, introducing dopants into the semiconductor layer to form a source region and a drain region masked by the metal gate, and illuminating the source and the drain regions with a pulsed excimer laser having a wavelength from about 150 nm to 350 nm to anneal the source region and the drain region.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: April 16, 2002
    Assignee: United States of America as represented by the Secretary of the Navy
    Inventors: Stephen D. Russell, Douglas A. Sexton, Bruce W. Offord, George P. Imthurn
  • Patent number: 6365936
    Abstract: A liquid crystal array and associated drive circuitry are monolithically formed on a silicon-on-sapphire structure, and are fabricated by a method comprising the steps of: a) forming an epitaxial silicon layer on a sapphire substrate to create a silicon-on-sapphire structure; b) ion implanting the epitaxial silicon layer; c) annealing the silicon-on-sapphire structure; d) oxidizing the epitaxial silicon layer to form a silicon dioxide layer from a portion of the epitaxial silicon layer so that a thinned epitaxial silicon layer remains; e) removing the silicon dioxide layer to expose the thinned epitaxial silicon layer; f) fabricating an array of pixels from the thinned epitaxial silicon layer wherein each of the pixels includes a liquid crystal capacitor; and g) fabricating integrated circuitry from the thinned epitaxial silicon layer which is operably coupled to modulate the pixels.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: April 2, 2002
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Randy L. Shimabukuro, Stephen D. Russell, Bruce W. Offord
  • Patent number: 6312968
    Abstract: A method for fabricating a monolithically integrated liquid crystal array display and control circuitry on a silicon-on-sapphire structure comprises the steps of: a) forming an epitaxial silicon layer on a sapphire substrate to create a silicon-on-sapphire structure; b) ion implanting the epitaxial silicon layer; c) annealing the silicon-on sapphire structure; d) oxidizing the epitaxial silicon layer to form a silicon dioxide layer from portion of the epitaxial silicon layer so that a thinned epitaxial silicon layer remains; e) removing the silicon dioxide layer to expose the thinned epitaxial silicon layer; f) fabricating an array of pixels from the thinned epitaxial silicon layer; and g) fabricating integrated circuitry from the thinned epitaxial silicon layer which is operably coupled to modulate the pixels. The thinned epitaxial silicon supports the fabrication of device quality circuitry which is used to control the operation of the pixels.
    Type: Grant
    Filed: March 25, 1998
    Date of Patent: November 6, 2001
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Randy L. Shimabukuro, Stephen D. Russell, Bruce W. Offord
  • Patent number: 6190933
    Abstract: A liquid crystal array and associated drive circuitry are monolithically formed on a silicon-on-sapphire structure, and are fabricated by a method comprising the steps of: a) forming an epitaxial silicon layer on a sapphire substrate to create a silicon-on-sapphire structure; b) ion implanting the epitaxial silicon layer; c) annealing the silicon-on sapphire structure; d) oxidizing the epitaxial silicon layer to form a silicon dioxide layer from a portion of the epitaxial silicon layer so that a thinned epitaxial silicon layer remains; e) removing the silicon dioxide layer to expose the thinned epitaxial silicon layer; f) fabricating an array of pixels from the thinned epitaxial silicon layer wherein each of the pixels includes a liquid crystal capacitor; and g) fabricating integrated circuitry from the thinned epitaxial silicon layer which is operably coupled to modulate the pixels.
    Type: Grant
    Filed: March 25, 1998
    Date of Patent: February 20, 2001
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Randy L. Shimabukuro, Stephen D. Russell, Bruce W. Offord
  • Patent number: H1637
    Abstract: The fabrication of bipolar junction transistors in silicon-on-sapphire (SOS) relies upon the laser-assisted dopant activation in SOS. A patterned 100% aluminum mask whose function is to reflect laser light from regions where melting of the silicon is undesirable is provided on an SOS wafer to be processed. The wafer is placed within a wafer carrier that is evacuated and backfilled with an inert atmosphere and that is provided with a window transparent to the wavelength of the laser beam to allow illumination of the masked wafer when the carrier is inserted into a laser processing system. A pulsed laser (typically an excimer laser) beam is appropriately shaped and homogenized and one or more pulses are directed onto the wafer. The laser beam pulse energy and pulse duration are set to obtain the optimal fluence impinging on the wafer in order to achieve the desired melt duration and corresponding junction depth.
    Type: Grant
    Filed: September 18, 1991
    Date of Patent: March 4, 1997
    Inventors: Bruce W. Offord, Stephen D. Russell, Kurt H. Weiner