Abstract: An integrated circuit and method of forming an integrated circuit having a memory portion minimizes an amount of oxidation of nanocluster storage elements in the memory portion. A first region of the integrated circuit has non-memory devices, each having a control electrode or gate formed of a single conductive layer of material. A second region of the integrated circuit has a plurality of memory cells, each having a control electrode of at least two conductive layers of material that are positioned one overlying another. The at least two conductive layers are at substantially a same electrical potential when operational and form a single gate electrode. In one form each memory cell gate has two polysilicon layers overlying a nanocluster storage layer.

Abstract: A method, apparatus, system, and signal-bearing medium that in an embodiment select a simulator input fragment, characterize an I/O model using a set of simulator input fragments, create a set of behavioral models based on the characterization and compare the set of behavioral models to the I/O model. In an embodiment, the set of behavioral models is compared to the I/O model by creating simulator input decks that include net topology for the I/O model and the set of behavioral models, simulating the decks, and comparing the output from the simulating.

Abstract: A virtual soft tissue control system that provides enhanced motion control to a prosthetic simulator machine. The prosthetic simulator provides a non-human environment in which to evaluate new and existing prosthetic devices, particularly implantable prosthetic devices, through accelerated life testing. The control system advantageously adds a “virtual soft tissue” control scheme to a conventional control system, such as a digital proportional integral derivative (PID) controller, to algorithmically model the soft tissue constraints that would be encountered by the prosthesis within the human body, and account for these forces in driving the simulator. In another aspect, a prosthetic simulator comprises a prosthetic drive mechanism; a feedback control system that drives the prosthetic drive mechanism; and an iterative learning control system that determines an error from a previous iteration of motion of the drive mechanism and uses the error to determine a drive signal for a subsequent iteration of motion.

Abstract: A patterned polysilicon gate is over a metal layer that is over a gate dielectric layer, which in turn is over a semiconductor substrate. A thin layer of material is conformally deposited over the polysilicon gate and the exposed metal layer and then etched back to form a sidewall spacer on the polysilicon gate and to re-expose the previously exposed portion of the metal layer. The re-exposed metal layer is etched using an etchant that is selective to the gate dielectric material and the sidewall spacer. Even though this etch is substantially anisotropic, it has an isotropic component that would etch the sidewall of the polysilicon gate but for the protection provided by the sidewall spacer. After the re-exposed metal has been removed, a transistor is formed in which the metal layer sets the work function of the gate of the transistor.

Abstract: A method, apparatus and program product oversee and coordinate the automatic generation, monitoring and submission of package files and other modeling processes to enable focused, flexible and efficient modeling of design performance characteristics.

Abstract: A method, apparatus and program product generate package files that are separately stored and selectively combined to generate a net file suited for system simulation and analysis. Selective combination of the package files using respective reference connections of each package enables focused and efficient modeling of design performance characteristics.

Abstract: A nanocrystal non-volatile memory (NVM) has a dielectric between the control gate and the nanocrystals that has a nitrogen content sufficient to reduce the locations in the dielectric where electrons can be trapped. This is achieved by grading the nitrogen concentration. The concentration of nitrogen is highest near the nanocrystals where the concentration of electron/hole traps tend to be the highest and is reduced toward the control gate where the concentration of electron/hole traps is lower. This has been found to have the beneficial effect of reducing the number of locations where charge can be trapped.

Abstract: An integrated circuit and method of forming an integrated circuit having a memory portion minimizes an amount of oxidation of nanocluster storage elements in the memory portion. A first region of the integrated circuit has non-memory devices, each having a control electrode or gate formed of a single conductive layer of material. A second region of the integrated circuit has a plurality of memory cells, each having a control electrode of at least two conductive layers of material that are positioned one overlying another. The at least two conductive layers are at substantially a same electrical potential when operational and form a single gate electrode. In one form each memory cell gate has two polysilicon layers overlying a nanocluster storage layer.

Abstract: In one embodiment, a method for discharging a semiconductor device includes providing a semiconductor substrate, forming a hole blocking dielectric layer over the semiconductor substrate, forming nanoclusters over the hole blocking dielectric layer, forming a charge trapping layer over the nanoclusters, and applying an electric field to the nanoclusters to discharge the semiconductor device. Applying the electric field may occur while applying ultraviolet (UV) light. In one embodiment, the hole blocking dielectric layer comprises forming the hole blocking dielectric layer having a thickness greater than approximately 50 Angstroms.

Abstract: An optical fiber propagation time measurement circuit. A light pulse is iteratively transmitted into a near end of a fiber under test (FUT) at a predetermined frequency and detected at a far end of the FUT after a propagation time. A repetitive propagation signal having a predetermined amplitude and a width corresponding the propagation time is developed by detection circuitry. The d.c. voltage average of the propagation signal is determined and used to compute the propagation time since the ratio of the d.c. voltage average to the predetermined amplitude is equal to the ratio of the propagation time to the period of the light pulses.

Abstract: A process of forming a device with nanoclusters. The process includes forming nanoclusters (e.g. silicon nanocrystals) and forming an oxidation barrier layer over the nanoclusters to inhibit oxidizing agents from oxidizing the nanoclusters during a subsequent formation of a dielectric of the device. At least a portion of the oxidation barrier layer is removed after the formation of the dielectric. In one example, the device is a memory wherein the nanoclusters are utilized as charge storage locations for charge storage transistors of the memory. In this example, the oxidation barrier layer protects the nanoclusters from oxidizing agents due to the formation of gate dielectric for high voltage transistors of the memory.

Abstract: Within a method for predicting customer satisfaction for a transportation vehicle there is measured for the transportation vehicle a Noise, Vibration and Harshness (NVH) level within the transportation vehicle when an engine which powers the transportation vehicle is operating at wide open throttle. The method further provides for determining a customer satisfaction value for a specific transportation vehicle by means of interpolation or extrapolation from an existing correlation for a group of transportation vehicles within the same class. Such a correlation is obtained employing a Transformed Gamma Distribution (TGD) model or an aggregate combination of Transformed Gamma Distribution (TGD) models.

Abstract: A method and system for predicting the sensitivity of the integrated circuit logic cell timing performance to variations in voltage and temperature. Rather than using the prior art approach of multiplicative derating factors to model voltage and temperature effects on timing performance, adders are used to model the change in performance due to variations in operating conditions (i.e., voltage and temperature). The adders are treated as functions of input transition time (Tx) and output load capacitance (Cload). The change in performance as measured in time forms a plane over the Tx-Cload operating range for variations in either voltage or temperature. The adders, using a plane equation as a function of Tx and Cload, greatly improve the absolute accuracy in predicting the effects of variations in voltage and temperature, as compared to using the prior art methods involving multiplicative derating factors.

Abstract: Modeling of propagation delay and output transition time by use of fitting functions comprised of standard Taylor series and inverse powers is disclosed. These components are used as a basis for generating an equation that predicts circuit performance over a wide range of input transition and output capacitive loads. The present invention includes a computer implemented method for adding functions to the fitting functions or removing functions from the fitting functions until an acceptable error limit has been reached.

Abstract: An automated turret lathe is provided with an automated finished part collection system. The parts are collected as they are produced and are not allowed to fall among chips, shavings and other debris in the turret lathe bed. As the turret head of the turret lathe is withdrawn to allow each machined portion of the work stock to be cut from the remaining raw, unmachined bar of work stock, the turret head travels along a path of withdrawal in which an actuating means is located. The actuating means triggers advancement of an elongated arm and rotation of a collection receptacle that is secured to the end of the elongated arm. The receptacle is oriented concave upward as it is brought into a position immediately beneath the machined portion of the work stock. When that portion is cut from the remaining bar of work stock as a finished part, it falls into the receptacle which then is retracted.

Abstract: A simple technique for the simultaneous measurement of relative levels of a specific mRNA in numberous small samples of biological specimens is described. The technique involves denaturation of cytoplasmic preparations, followed by dotting of up to 96 samples onto a single sheet of nitrocellulose, hybridization with a .sup.32 P-labeled cDNA plasmid, autoradiography, and scanning. By analyzing cytoplasmic preparations instead of purified RNA, manipulations of multiple samples prior to analysis are minimized. Experiments with a clonal line of rat pituitary tumor (GH.sub.3) cells show that this technique can be employed to follow the induction by Ca.sup.2+ of prolactin mRNA sequences, employing cytoplasm prepared from as little as 2.5.times.10.sup.4 cells. The specificity of the technique for prolactin mRNA is shown by employing GC cells, a GH.sub.3 cell variant lacking detectable prolactin mRNA sequences.