Abstract: Methods and apparatus for a detector system to detect gamma and neutron radiation. In one embodiment, a detector comprises a tank to hold a liquid, a plurality of tubes adjacent the tank to detect neutrons, and a plurality of photon detectors to detect Cherenkov light generated by gamma radiation in the liquid. The tank is configured to contain the liquid so that the liquid generates the Cherenkov light and moderates the neutrons.

Abstract: Methods and apparatus for a detector system to detect gamma and neutron radiation. In one embodiment, a detector comprises a tank to hold a liquid, a plurality of tubes adjacent the tank to detect neutrons, and a plurality of photon detectors to detect Cherenkov light generated by gamma radiation in the liquid. The tank is configured to contain the liquid so that the liquid generates the Cherenkov light and moderates the neutrons.

Abstract: An improved microelectronic assembly (100) and packaging method includes a device package for housing a semiconductor die or chip, (105), an array of passive electronic components (305-355) operating in cooperation with the flip chip semiconductor die (105) and housed inside the device package to decouple noise from input signals, and a heat spreader (195) disposed between a top surface of the semiconductor die (105) and a package cover (185). The semiconductor die (105) is configured as a flip chip die and the device package includes a package substrate (110) configured as a ball grid array. The improved microelectronic device (100) reduces parasitic inductance in electrical interconnections between the semiconductor die and an electrical system substrate (115) and reduces signal noise in mixed signal high frequency analog to digital converters operating at clock rates above 1 GHz.

Abstract: An improved microelectronic assembly (100) and packaging method includes a device package for housing a semiconductor die or chip, (105), an array of passive electronic components (305-355) operating in cooperation with the flip chip semiconductor die (105) and housed inside the device package to decouple noise from input signals, and a heat spreader (195) disposed between a top surface of the semiconductor die (105) and a package cover (185). The semiconductor die (105) is configured as a flip chip die and the device package includes a package substrate (110) configured as a ball grid array. The improved microelectronic device (100) reduces parasitic inductance in electrical interconnections between the semiconductor die and an electrical system substrate (115) and reduces signal noise in mixed signal high frequency analog to digital converters operating at clock rates above 1 GHz.

Abstract: An improved microelectronic assembly (100) and packaging method includes a device package for housing a semiconductor die or chip, (105), an array of passive electronic components (305-355) operating in cooperation with the flip chip semiconductor die (105) and housed inside the device package to decouple noise from input signals, and a heat spreader (195) disposed between a top surface of the semiconductor die (105) and a package cover (185). The semiconductor die (105) is configured as a flip chip die and the device package includes a package substrate (110) configured as a ball grid array. The improved microelectronic device (100) reduces parasitic inductance in electrical interconnections between the semiconductor die and an electrical system substrate (115) and reduces signal noise in mixed signal high frequency analog to digital converters operating at clock rates above 1 GHz.

Abstract: An improved microelectronic assembly (100) and packaging method includes a device package for housing a semiconductor die or chip, (105), an array of passive electronic components (305-355) operating in cooperation with the flip chip semiconductor die (105) and housed inside the device package to decouple noise from input signals, and a heat spreader (195) disposed between a top surface of the semiconductor die (105) and a package cover (185). The semiconductor die (105) is configured as a flip chip die and the device package includes a package substrate (110) configured as a ball grid array. The improved microelectronic device (100) reduces parasitic inductance in electrical interconnections between the semiconductor die and an electrical system substrate (115) and reduces signal noise in mixed signal high frequency analog to digital converters operating at clock rates above 1 GHz.

Abstract: An electrical transformer having primary winding segments and secondary winding segments interconnected, respectively, by first and second multilevel printed circuit boards disposed in a pair of overlaying planes and additional segments disposed perpendicular to the overlaying planes.

Abstract: An electrical transformer having a core disposed between a pair of dielectrics. The first dielectric has a plurality of first electrically isolated electrical conductor segments disposed on each one of a plurality of electrically isolated levels of such first dielectric. The second dielectric board is disposed over, and is in registration with, the first dielectric. The second dielectric has a plurality of second electrically isolated electrical conductor segments disposed on each one of a plurality of electrically isolated levels of such second dielectric. The core has an aperture therein. The aperture extends between the first and second dielectrics. A dielectric body is disposed in the aperture. The body has disposed therein a plurality of third electrically isolated electrical conductor segments. First ends of the third electrically isolated electrical conductor segments are electrically connected to the plurality of first electrically isolated electrical conductor segments.