Patents by Inventor Bruno Gailhard

Bruno Gailhard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10303234
    Abstract: An integrated processing unit is supplied by a power supply voltage present at the terminals of a capacitor configured to supply a maximum permissible voltage drop. A periodic pulse signal is generated having a period that is less than or equal to a current period determined from the maximum permissible voltage drop and a current consumption of the processing unit. The power supply voltage is compared with a threshold voltage at the pulse rate of the periodic pulse signal. A control signal generated from that comparison is delivered to the processing unit and has a first value when the power supply voltage is greater than or equal to the threshold voltage and a second value when the power supply voltage is less than the threshold voltage.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: May 28, 2019
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Bruno Gailhard
  • Patent number: 10230363
    Abstract: A method is used to control an electronic device that includes a switching unit having a main MOS transistor having a substrate, a first conducting electrode and a second conducting electrode coupled to an output terminal. The method includes controlling the main transistor in such a way as to put it into an on state or an off state such that, when the main transistor is in the on state, the substrate and the first conducting electrode of the main transistor are connected to an input terminal and, when the main transistor is in the off state, the first conducting electrode of the main transistor is isolated from the input terminal and a first bias voltage is applied to the first conducting electrode and a second bias voltage is applied to the substrate of the main transistor.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: March 12, 2019
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Bruno Gailhard, Michel Cuenca
  • Publication number: 20180321727
    Abstract: An integrated processing unit is supplied by a power supply voltage present at the terminals of a capacitor configured to supply a maximum permissible voltage drop. A periodic pulse signal is generated having a period that is less than or equal to a current period determined from the maximum permissible voltage drop and a current consumption of the processing unit. The power supply voltage is compared with a threshold voltage at the pulse rate of the periodic pulse signal. A control signal generated from that comparison is delivered to the processing unit and has a first value when the power supply voltage is greater than or equal to the threshold voltage and a second value when the power supply voltage is less than the threshold voltage.
    Type: Application
    Filed: January 30, 2018
    Publication date: November 8, 2018
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: Bruno Gailhard
  • Publication number: 20170222639
    Abstract: A method is used to control an electronic device that includes a switching unit having a main MOS transistor having a substrate, a first conducting electrode and a second conducting electrode coupled to an output terminal. The method includes controlling the main transistor in such a way as to put it into an on state or an off state such that, when the main transistor is in the on state, the substrate and the first conducting electrode of the main transistor are connected to an input terminal and, when the main transistor is in the off state, the first conducting electrode of the main transistor is isolated from the input terminal and a first bias voltage is applied to the first conducting electrode and a second bias voltage is applied to the substrate of the main transistor.
    Type: Application
    Filed: April 18, 2017
    Publication date: August 3, 2017
    Inventors: Bruno Gailhard, Michel Cuenca
  • Patent number: 9654095
    Abstract: A method is used to control an electronic device that includes a switching unit having a main MOS transistor having a substrate, a first conducting electrode and a second conducting electrode coupled to an output terminal. The method includes controlling the main transistor in such a way as to put it into an on state or an off state such that, when the main transistor is in the on state, the substrate and the first conducting electrode of the main transistor are connected to an input terminal and, when the main transistor is in the off state, the first conducting electrode of the main transistor is isolated from the input terminal and a first bias voltage is applied to the first conducting electrode and a second bias voltage is applied to the substrate of the main transistor.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: May 16, 2017
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Bruno Gailhard, Michel Cuenca
  • Patent number: 9460808
    Abstract: A method is provided for controlling a sample and hold circuit that includes a switching module coupled to a storage capacitor. A circuit external to the sample and hold circuit of generates at least one main current representative of at least one leakage current of the switching module in its off state. The at least one main current is delivered to at least one auxiliary capacitor. An initial pulse signal is generated from the charging and discharging of the at least one auxiliary capacitor. The sampling phase of the sample and hold circuit is triggered at the rate of the pulses of a pulse signal derived from the initial pulse signal.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: October 4, 2016
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Bruno Gailhard, Yohan Joly
  • Patent number: 9325325
    Abstract: A method includes generation of a first current proportional to absolute temperature and formation of a second current representative of the temperature variation of the threshold voltages of the transistors of the inverter and limited to a fraction of the first current. This fraction is less than one. The inverter is supplied with a supply current equal to the first current minus the limited second current.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: April 26, 2016
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Bruno Gailhard, Michel Cuenca
  • Publication number: 20150155053
    Abstract: A method is provided for controlling a sample and hold circuit that includes a switching module coupled to a storage capacitor. A circuit external to the sample and hold circuit of generates at least one main current representative of at least one leakage current of the switching module in its off state. The at least one main current is delivered to at least one auxiliary capacitor. An initial pulse signal is generated from the charging and discharging of the at least one auxiliary capacitor. The sampling phase of the sample and hold circuit is triggered at the rate of the pulses of a pulse signal derived from the initial pulse signal.
    Type: Application
    Filed: November 20, 2014
    Publication date: June 4, 2015
    Inventors: Bruno Gailhard, Yohan Joly
  • Publication number: 20150145564
    Abstract: A method is used to control an electronic device that includes a switching unit having a main MOS transistor having a substrate, a first conducting electrode and a second conducting electrode coupled to an output terminal. The method includes controlling the main transistor in such a way as to put it into an on state or an off state such that, when the main transistor is in the on state, the substrate and the first conducting electrode of the main transistor are connected to an input terminal and, when the main transistor is in the off state, the first conducting electrode of the main transistor is isolated from the input terminal and a first bias voltage is applied to the first conducting electrode and a second bias voltage is applied to the substrate of the main transistor.
    Type: Application
    Filed: November 7, 2014
    Publication date: May 28, 2015
    Inventors: Bruno Gailhard, Michel Cuenca
  • Publication number: 20150097630
    Abstract: A method includes generation of a first current proportional to absolute temperature and formation of a second current representative of the temperature variation of the threshold voltages of the transistors of the inverter and limited to a fraction of the first current. This fraction is less than one. The inverter is supplied with a supply current equal to the first current minus the limited second current.
    Type: Application
    Filed: September 30, 2014
    Publication date: April 9, 2015
    Inventors: Bruno Gailhard, Michel Cuenca
  • Publication number: 20120293154
    Abstract: A circuit for generating a temperature-stable reference voltage, including, between two terminals of application of a D.C. voltage: a current source and at least two parallel branches, each comprising a resistive element and one or several transistors, the transistors being different form one another and the reference voltage being sampled between the terminals of said branches.
    Type: Application
    Filed: May 18, 2012
    Publication date: November 22, 2012
    Applicant: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Anass Samir, Bruno Gailhard
  • Patent number: 6913198
    Abstract: A smart card reader includes a housing for receiving a smart card, a microprocessor, and a connector for connecting the microprocessor to the received smart card for establishing communications therebetween. A voltage source provides a power supply voltage to the microprocessor based upon the smart card being received in the housing. The smart card reader further includes a first switch interposed between the voltage source and a power supply terminal of the microprocessor. The first switch is closed when the received smart card is at an end of travel in the housing so that the power supply voltage is provided to the microprocessor, and is opened when the received smart card is no longer at the end of travel in the housing so that the power supply voltage is not provided to the microprocessor.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: July 5, 2005
    Assignee: STMicroelectronics SA
    Inventors: Ludovic Ruat, Olivier Ferrand, Bruno Gailhard
  • Publication number: 20040226999
    Abstract: A smart card reader includes a housing for receiving a smart card, a microprocessor, and a connector for connecting the microprocessor to the received smart card for establishing communications therebetween. A voltage source provides a power supply voltage to the microprocessor based upon the smart card being received in the housing. The smart card reader further includes a first switch interposed between the voltage source and a power supply terminal of the microprocessor. The first switch is closed when the received smart card is at an end of travel in the housing so that the power supply voltage is provided to the microprocessor, and is opened when the received smart card is no longer at the end of travel in the housing so that the power supply voltage is not provided to the microprocessor.
    Type: Application
    Filed: June 22, 2004
    Publication date: November 18, 2004
    Applicant: STMicroelectronics SA
    Inventors: Ludovic Ruat, Olivier Ferrand, Bruno Gailhard
  • Patent number: 6772946
    Abstract: A smart card reader includes a housing for receiving a smart card, a microprocessor, and a connector for connecting the microprocessor to the received smart card for establishing communications therebetween. A voltage source provides a power supply voltage to the microprocessor based upon the smart card being received in the housing. The smart card reader further includes a first switch interposed between the voltage source and a power supply terminal of the microprocessor. The first switch is closed when the received smart card is at an end of travel in the housing so that the power supply voltage is provided to the microprocessor, and is opened when the received smart card is no longer at the end of travel in the housing so that the power supply voltage is not provided to the microprocessor.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: August 10, 2004
    Assignee: STMicroelectronics SA
    Inventors: Ludovic Ruat, Olivier Ferrand, Bruno Gailhard
  • Patent number: 6759893
    Abstract: A temperature-compensated current source includes a first arm fixing a reference voltage, a second arm fixing a reference current, and a third arm providing an output current obtained by copying the reference current in a first current mirror. A second current mirror copies, in the voltage reference arm, the reference current while a voltage copying circuit copies the reference voltage at a node of the second arm connected to ground by a first resistor series-connected with n parallel-connected diodes. A second resistor is parallel-connected with the assembly formed by the first resistor series-connected with the n parallel-connected diodes.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: July 6, 2004
    Assignee: STMicroelectronics SA
    Inventors: Bruno Gailhard, Olivier Ferrand
  • Patent number: 6731178
    Abstract: A generator includes an oscillator for producing a clock signal from an N-bit control number. The oscillator includes a first group of cells, with each cell including at least one series connected inverter. A first selection circuit selects a variable number of the cells as a function of the most significant bits of the control number. The oscillator also includes a second group of cells, with each cell including at least one series connected inverter. A second selection circuit selects one of the cells as a function of the least significant bits of the control number. The selected cells of the first and second groups of cells are series connected to form a chain of inverters.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: May 4, 2004
    Assignee: STMicroelectronics SA
    Inventors: Bruno Gailhard, Olivier Ferrand
  • Patent number: 6703880
    Abstract: An integrated circuit includes a generator for providing a clock signal from a reference signal. The generator, which is of the phase-locked loop type, includes a frequency divider and a phase comparator connected together. A reset circuit is connected to the frequency divider and to the phase comparator for providing a reset signal thereto at each leading edge of the reference signal for synchronizing a low-frequency signal with the reference signal.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: March 9, 2004
    Assignee: STMicroelectronics SA
    Inventors: Bruno Gailhard, Olivier Ferrand
  • Patent number: 6680633
    Abstract: A generator producing a clock signal whose frequency depends on a control voltage includes a comparator for comparing a period of the clock signal with a desired period, and for providing at least one first control signal based upon the comparison. The generator includes a sampler circuit for sampling the first control signal, and for producing a first sampled control signal. The generator also includes a voltage generator for providing the variable control voltage as a function of the first sampled control signal.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: January 20, 2004
    Assignee: STMicroelectronics SA
    Inventors: Bruno Gailhard, Olivier Ferrand
  • Patent number: 6667646
    Abstract: A generator includes an oscillator for producing a clock signal from N logic signals representing an N-bit control number, with N being an integer greater than 1. The oscillator has N+1 components. The N most significant components are each assigned a place value i ranging from 1 to N, and a least significant component provides the clock signal. At least one component with a place value i greater than 1 includes first and second arms. The first arm includes a cell and a first switch connected in series, and the second arm includes 1+21 cells and a second switch connected in series. Each cell includes an odd number of inverters.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: December 23, 2003
    Assignee: STMicroelectronics SA
    Inventors: Bruno Gailhard, Olivier Ferrand
  • Publication number: 20030132796
    Abstract: A temperature-compensated current source includes a first arm fixing a reference voltage, a second arm fixing a reference current, and a third arm providing an output current obtained by copying the reference current in a first current mirror. A second current mirror copies, in the voltage reference arm, the reference current while a voltage copying circuit copies the reference voltage at a node of the second arm connected to ground by a first resistor series-connected with n parallel-connected diodes. A second resistor is parallel-connected with the assembly formed by the first resistor series-connected with the n parallel-connected diodes.
    Type: Application
    Filed: November 25, 2002
    Publication date: July 17, 2003
    Applicant: STMicroelectronics S.A.
    Inventors: Bruno Gailhard, Olivier Ferrand