Abstract: A circuit, e.g., a CMOS sensor, with individually addressable transfer transistors and individually addressable reset transistors is described. Through the individually addressable transistors, pixels within different regions of interest, of the same or different size and/or the same or different exposure times, can be efficiently processed. Different regions of interest may be exposed concurrently and read out independently.

Abstract: A circuit, e.g., a CMOS sensor, with individually addressable transfer transistors and individually addressable reset transistors is described. Through the individually addressable transistors, pixels within different regions of interest, of the same or different size and/or the same or different exposure times, can be efficiently processed. Different regions of interest may be exposed concurrently and read out independently.

Abstract: The invention provides a linear sensor including a row 100 of N regularly spaced pixels that are formed in a semiconductor substrate, and a circuit for reading out the N pixels, which delivers an output signal for each of the N pixels of the row, characterized in that the N pixels comprise image-capturing pixels that have a useful photosensitive area in the shape of a rectangle R that is higher than it is wide, where the width is in the direction of the row and the height is in the perpendicular direction, and at least two spaced-apart pairs of alignment-detecting pixels PPL, PPR, wherein the detecting pixels of each pair are pixels P1, P2 that are adjacent in the row 100 of pixels and the useful photosensitive area DT1, DT2 of the detecting pixels has a width that varies monotonically in the height direction, but in opposite directions for the two detecting pixels of a given pair.

Abstract: The invention provides a linear sensor including a row 100 of N regularly spaced pixels that are formed in a semiconductor substrate, and a circuit for reading out the N pixels, which delivers an output signal for each of the N pixels of the row, characterized in that the N pixels comprise image-capturing pixels that have a useful photosensitive area in the shape of a rectangle R that is higher than it is wide, where the width is in the direction of the row and the height is in the perpendicular direction, and at least two spaced-apart pairs of alignment-detecting pixels PPL, PPR, wherein the detecting pixels of each pair are pixels P1, P2 that are adjacent in the row 100of pixels and the useful photosensitive area DT1, DT2 of the detecting pixels has a width that varies monotonically in the height direction, but in opposite directions for the two detecting pixels of a given pair.

Abstract: The invention relates to large-dimension linear image sensors operating by relative translation between the image and the sensor and consisting of a plurality of linear arrays abutting in a staggered fashion. In order to improve the design of the sensor, according to the invention the arrays are mounted on packages whose upper surface has an elongate rectangular shape provided on two opposite sides of the rectangle with two extensions substantially covered by the ends of the array, two adjacent packages bearing against each other along a respective extension of each of them. The staggered arrangement prevents the blind zones, photosensitive points being present in the extensions, and the offset between the two rows of staggered chips is practically no greater than the width of the chips.

Abstract: The invention relates to large-dimension linear image sensors operating by relative translation between the image and the sensor and consisting of a plurality of linear arrays abutting in a staggered fashion. In order to improve the design of the sensor, according to the invention the arrays are mounted on packages whose upper surface has an elongate rectangular shape provided on two opposite sides of the rectangle with two extensions substantially covered by the ends of the array, two adjacent packages bearing against each other along a respective extension of each of them. The staggered arrangement prevents the blind zones, photosensitive points being present in the extensions, and the offset between the two rows of staggered chips is practically no greater than the width of the chips.

Abstract: In a CCD type photosensitive device, the charges produced in two consecutive columns of pixels are transferred into different reading registers: the charges from the first column are loaded into the first register and the charges from the second column travel through the first register to be loaded into the second register. The two reading registers are controlled by independent potentials during the step for the loading of these registers. The device makes it possible to increase the efficiency of the transfer between the two reading registers, especially when the registers are of the type working in a two-phase mode.