Patents by Inventor Bruno J. Riel

Bruno J. Riel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9018515
    Abstract: A solar cell with spaced apart groupings of self-assembled quantum dot layers interposed with barrier layers. Such groupings allow improved control over the growth front quality of the solar cell, the crystalline structure of the solar cell, and on the performance metrics of the solar cell.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: April 28, 2015
    Assignee: Cyrium Technologies Incorporated
    Inventors: Simon Fafard, Bruno J. Riel
  • Patent number: 8362460
    Abstract: A multi junction solar cell having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The solar cell includes an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the solar cell and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: January 29, 2013
    Assignee: Cyrium Technologies Incorporated
    Inventors: Norbert Puetz, Simon Fafard, Bruno J. Riel
  • Publication number: 20120125418
    Abstract: A multi junction solar cell having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The solar cell includes an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the solar cell and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Application
    Filed: January 31, 2012
    Publication date: May 24, 2012
    Applicant: CYRIUM TECHNOLOGIES INCORPORATED
    Inventors: Norbert PUETZ, Simon FAFARD, Bruno J. RIEL
  • Patent number: 8124958
    Abstract: Electronic and opto-electronic devices having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The devices include an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the devices and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: February 28, 2012
    Assignee: Cyrium Technologies Incorporated
    Inventors: Norbert Puetz, Simon Fafard, Bruno J. Riel
  • Publication number: 20110277829
    Abstract: A solar cell with spaced apart groupings of self-assembled quantum dot layers interposed with barrier layers. Such groupings allow improved control over the growth front quality of the solar cell, the crystalline structure of the solar cell, and on the performance metrics of the solar cell.
    Type: Application
    Filed: June 30, 2011
    Publication date: November 17, 2011
    Applicant: CYRIUM TECHNOLOGIES INCORPORATED
    Inventors: Simon FAFARD, Bruno J. RIEL
  • Publication number: 20110073913
    Abstract: Electronic and opto-electronic devices having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The devices include an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the devices and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Application
    Filed: December 3, 2010
    Publication date: March 31, 2011
    Applicant: CYRIUM TECHNOLOGIES INCORPORATED
    Inventors: Norbert PUETZ, Simon FAFARD, Bruno J. RIEL
  • Patent number: 7872252
    Abstract: Electronic and opto-electronic devices having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The devices include an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the devices and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: January 18, 2011
    Assignee: Cyrium Technologies Incorporated
    Inventors: Norbert Puetz, Simon Fafard, Bruno J. Riel
  • Publication number: 20080035939
    Abstract: Electronic and opto-electronic devices having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The devices include an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the devices and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Application
    Filed: July 11, 2007
    Publication date: February 14, 2008
    Applicant: CYRIUM TECHNOLOGIES INCORPORATED
    Inventors: Norbert PUETZ, Simon FAFARD, Bruno J. RIEL