Abstract: The invention finds application in a TDMA communications controller having a plurality of i input/output ports. The input/output ports transfer data from respective, local data users to a transmit bus and transfer data from a receive bus to respective local users on a time interleaved basis during periodic TDMA frames. Each port operates at its own data rate R.sub.i, with data ports having different data rates in the controller. The invention includes a test card which has a read-only memory (ROM) for storing test patterns for each of the data rates R.sub.i. The test card further includes a random access memory (RAM) having an input connected to the ROM, for storing one of the test patterns from the ROM. The test card further includes a processor having control outputs to the RAM and the ROM for controlling the transfer of one of the test patterns from the ROM to the RAM for the data rate R.sub.j of the data port under test.