Abstract: In a method for operating a fingerprint sensor comprising a plurality of ultrasonic transducers, a first subset of ultrasonic transducers of the fingerprint sensor are activated, the first subset of ultrasonic transducers for detecting interaction between an object and the fingerprint sensor. Subsequent to detecting interaction between an object and the fingerprint sensor, a second subset of ultrasonic transducers of the fingerprint sensor are activated, the second subset of ultrasonic transducers for determining whether the object is a human finger, wherein the second subset of ultrasonic transducers comprises a greater number of ultrasonic transducers than the first subset of ultrasonic transducers.

Abstract: A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.

Abstract: Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

Abstract: An integrated circuit device includes a transmitter circuit operable to transmit a timing signal over a first wire to a DRAM. The DRAM receives a first signal having a balanced number of logical zero-to-one transitions and one-to-zero transitions and samples the first signal at a rising edge of the timing signal to produce a respective sampled value. The device further includes a receiver circuit to receive the respective sampled value from the DRAM over a plurality of wires separate from the first wire. In a first mode, the transmitter circuit repeatedly transmits incrementally offset versions of the timing signal to the DRAM until sampled values received from the DRAM change from a logical zero to a logical one or vice versa; and in a second mode, it transmits write data over the plurality of wires to the DRAM according to a write timing offset generated based on the sampled values.

Abstract: A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.

Abstract: Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns, and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

Abstract: A method for generating a composite image having an increased image pixel density by an array of ultrasonic transducers having a given spatial density is provided. The method comprises capturing a first set of pixels at an ultrasonic sensor using a first beamforming pattern, wherein the first beamforming pattern comprises a first pattern of ultrasonic transducers of the ultrasonic sensor. The method further comprises capturing a second set of pixels at the ultrasonic sensor using a second beamforming pattern, wherein the second beamforming pattern comprises a second pattern of ultrasonic transducers. The first beamforming pattern and the second beamforming pattern are different. Pixels of the second set of pixels correspond to positions between pixels of the first set of pixels. The method additionally comprises combining the first and second sets of pixels to form the composite image. An electronic device and a method of generating an image of a fingerprint are also provided.

Abstract: A method for generating an image is provided. The method comprises capturing a first set of image pixels by an ultrasonic sensor comprising an array of ultrasonic transducers using a first beamforming pattern, wherein the first beamforming pattern comprises a first pattern of transmit signals routed to a plurality of ultrasonic transducers of the ultrasonic sensor. The method further comprises capturing a second set of image pixels at the ultrasonic sensor using a second beamforming pattern, wherein the second beamforming pattern comprises a second pattern of transmit signals routed to the plurality of ultrasonic transducers. The second beamforming pattern is different than the first beamforming pattern. The second set of image pixels corresponds to an edge region of the ultrasonic sensor. The method additionally comprises combining the first set of image pixels and the second set of image pixels to form the image.

Abstract: A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.

Abstract: An integrated circuit device includes an output driver having a data signal terminal, logic circuitry, and a driver circuit coupled to the logic circuitry and data signal terminal. The driver circuit is configured to drive a signal corresponding to a symbol onto the data signal terminal, wherein the symbol is an N-bit symbol, having one of 2N predefined values, N is an integer greater than 1, and the signal corresponding to the symbol has one of 2N signal levels. The driver circuit includes first, second and third driver sub-circuits, each driven by an input corresponding to one or more bits of the N-bit symbol, wherein the second and third driver sub-circuits are weighted, relative to the first driver sub-circuit, to reduce gds distortion in the signal.

Abstract: An integrated circuit device includes a transmitter circuit operable to transmit a timing signal over a first wire to a DRAM. The DRAM receives a first signal having a balanced number of logical zero-to-one transitions and one-to-zero transitions and samples the first signal at a rising edge of the timing signal to produce a respective sampled value. The device further includes a receiver circuit to receive the respective sampled value from the DRAM over a plurality of wires separate from the first wire. In a first mode, the transmitter circuit repeatedly transmits incrementally offset versions of the timing signal to the DRAM until sampled values received from the DRAM change from a logical zero to a logical one or vice versa; and in a second mode, it transmits write data over the plurality of wires to the DRAM according to a write timing offset generated based on the sampled values.

Abstract: A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.

Abstract: In a method for transmit beamforming of a two-dimensional array of ultrasonic transducers, a beamforming pattern to apply to a beamforming space of the two-dimensional array of ultrasonic transducers is defined. The beamforming space includes a plurality of elements, where each element of the beamforming space corresponds to an ultrasonic transducer of the two-dimensional array of ultrasonic transducers, where the beamforming pattern identifies which ultrasonic transducers within the beamforming space are activated during a transmit operation of the two-dimensional array of ultrasonic transducers, and wherein at least some of the ultrasonic transducers that are activated are phase delayed with respect to other ultrasonic transducers that are activated. The beamforming pattern is applied to the two-dimensional array of ultrasonic transducers. A transmit operation is performed by activating the ultrasonic transducers of the beamforming space according to the beamforming pattern.

Abstract: In a method for operating a fingerprint sensor comprising a plurality of ultrasonic transducers, a first subset of ultrasonic transducers of the fingerprint sensor are activated, the first subset of ultrasonic transducers for detecting interaction between an object and the fingerprint sensor. Subsequent to detecting interaction between an object and the fingerprint sensor, a second subset of ultrasonic transducers of the fingerprint sensor are activated, the second subset of ultrasonic transducers for determining whether the object is a human finger, wherein the second subset of ultrasonic transducers comprises a greater number of ultrasonic transducers than the first subset of ultrasonic transducers.

Abstract: An ultrasonic sensor includes a two-dimensional array of ultrasonic transducers. A signal generator is configured to generate a plurality of transmit signals, wherein each transmit signal of the plurality of transmit signals has a different phase delay relative to other transmit signals of the plurality of transmit signals. A plurality of shift registers is configured to store a beamforming space including a beamforming pattern to apply to the two-dimensional array, wherein the beamforming pattern identifies a transmit signal of the plurality of transmit signals that is applied to each ultrasonic transducer of the beamforming space that is activated during a transmit operation. An array controller is configured to control activation of ultrasonic transducers during a transmit operation according to the beamforming pattern and configured to shift a position of the beamforming space within the plurality of shift registers such that the beamforming space moves within the two-dimensional array.

Abstract: An ultrasonic sensor includes a two-dimensional array of ultrasonic transducers including a plurality of sub-arrays of ultrasonic transducers, wherein a sub-array of ultrasonic transducers of the plurality of sub-arrays of ultrasonic transducers is independently controllable, and wherein a sub-array of ultrasonic transducers has an associated receive channel. A plurality of shift registers is configured to select a receive pattern of ultrasonic transducers of the two-dimensional array of ultrasonic transducers to activate during a receive operation. An array controller is configured to control selection of the ultrasonic transducers during the receive operation according to the receive pattern and configured to shift a position of the receive pattern within the plurality of shift registers such that the ultrasonic transducers activated during the receive operation moves relative to and within the two-dimensional array of ultrasonic transducers.

Abstract: In a method of using an ultrasonic sensor comprising a two-dimensional array of ultrasonic transducers, a plurality of ultrasonic signals are transmitted according to a beamforming pattern at a position of the two-dimensional array. The beamforming pattern focuses the plurality of ultrasonic signals to location above the two-dimensional array, wherein the beamforming pattern identifies ultrasonic transducers of the two-dimensional array that are activated during transmission of the ultrasonic signals, and wherein at least some ultrasonic transducers of the beamforming pattern are phase delayed with respect to other ultrasonic transducers of the beamforming pattern. At least one reflected ultrasonic signal is received at the position according to a receive pattern, wherein the receive pattern identifies at least one ultrasonic transducers of the two-dimensional array that is activated during the receiving. The transmitting and the receiving are repeated at a plurality of positions of the two-dimensional array.

Abstract: An integrated circuit device includes a transmitter circuit operable to transmit a timing signal over a first wire to a DRAM. The DRAM receives a first signal having a balanced number of logical zero-to-one transitions and one-to-zero transitions and samples the first signal at a rising edge of the timing signal to produce a respective sampled value. The device further includes a receiver circuit to receive the respective sampled value from the DRAM over a plurality of wires separate from the first wire. In a first mode, the transmitter circuit repeatedly transmits incrementally offset versions of the timing signal to the DRAM until sampled values received from the DRAM change from a logical zero to a logical one or vice versa; and in a second mode, it transmits write data over the plurality of wires to the DRAM according to a write timing offset generated based on the sampled values.

Abstract: An integrated circuit device includes an output driver having a data signal terminal, logic circuitry, and a driver circuit coupled to the logic circuitry and data signal terminal. The driver circuit is configured to drive a signal corresponding to a symbol onto the data signal terminal, wherein the symbol is an N-bit symbol, having one of 2N predefined values, N is an integer greater than 1, and the signal corresponding to the symbol has one of 2N signal levels. The driver circuit includes first, second and third driver sub-circuits, each driven by an input corresponding to one or more bits of the N-bit symbol, wherein the second and third driver sub-circuits are weighted, relative to the first driver sub-circuit, to reduce gds distortion in the signal.

Abstract: Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns, and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.