Patents by Inventor Bryan Ackland
Bryan Ackland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120001059Abstract: An improved CMOS pixel with a combination of analog and digital readouts to provide a large pixel dynamic range without compromising low-light performance using a comparator to test the value of an accumulated charge at a series of exponentially increasing exposure times. The test is used to stop the integration of photocurrent once the accumulated analog voltage has reached a predetermined threshold. A one-bit output value of the test is read out of the pixel (digitally) at each of the exponentially increasing exposure periods. At the end of the integration period, the analog value stored on the integration capacitor is read out using conventional CMOS active pixel readout circuits.Type: ApplicationFiled: August 18, 2011Publication date: January 5, 2012Applicant: Infrared Newco, Inc.Inventor: BRYAN ACKLAND
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Publication number: 20100264296Abstract: An improved CMOS pixel with a combination of analog and digital readouts to provide a large pixel dynamic range without compromising low-light performance using a comparator to test the value of an accumulated charge at a series of exponentially increasing exposure times. The test is used to stop the integration of photocurrent once the accumulated analog voltage has reached a predetermined threshold. A one-bit output value of the test is read out of the pixel (digitally) at each of the exponentially increasing exposure periods. At the end of the integration period, the analog value stored on the integration capacitor is read out using conventional CMOS active pixel readout circuits.Type: ApplicationFiled: February 4, 2008Publication date: October 21, 2010Applicant: Noble Peak Vision Corp.Inventor: Bryan Ackland
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Patent number: 7326903Abstract: An improved CMOS pixel with a combination of analog and digital readouts to provide a large pixel dynamic range without compromising low-light performance using a comparator to test the value of an accumulated charge at a series of exponentially increasing exposure times. The test is used to stop the integration of photocurrent once the accumulated analog voltage has reached a predetermined threshold. A one-bit output value of the test is read out of the pixel (digitally) at each of the exponentially increasing exposure periods. At the end of the integration period, the analog value stored on the integration capacitor is read out using conventional CMOS active pixel readout circuits.Type: GrantFiled: June 29, 2006Date of Patent: February 5, 2008Assignee: Noble Peak Vision Corp.Inventor: Bryan Ackland
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Publication number: 20080001065Abstract: An improved CMOS pixel with a combination of analog and digital readouts to provide a large pixel dynamic range without compromising low-light performance using a comparator to test the value of an accumulated charge at a series of exponentially increasing exposure times. The test is used to stop the integration of photocurrent once the accumulated analog voltage has reached a predetermined threshold. A one-bit output value of the test is read out of the pixel (digitally) at each of the exponentially increasing exposure periods. At the end of the integration period, the analog value stored on the integration capacitor is read out using conventional CMOS active pixel readout circuits.Type: ApplicationFiled: June 29, 2006Publication date: January 3, 2008Applicant: NOBLE DEVICE TECHNOLOGIES, CORP.Inventor: Bryan Ackland
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Publication number: 20070127922Abstract: A clock signal distribution circuit including: a signal transmission system having first and second signal transmission lines, each extending from the first end to the second end of the signal transmission system, the first signal transmission line for carrying a first periodic signal from the first end to the second end of the signal transmission system, the second signal transmission line for carrying a second periodic signal from the second end to the first end of the signal transmission system transmission; and a local clock signal generator circuit including a detector system for detecting at a preselected location along the signal transmission system the first and second periodic signals, wherein the generator circuit generates from both the detected first and second periodic signals a local clock signal that has a predetermined skew that is between to the skews of the detected first and second periodic signals.Type: ApplicationFiled: April 18, 2006Publication date: June 7, 2007Applicant: Applied Materials, Inc.Inventors: Vladimir Prodanov, Mihai Banu, Bryan Ackland
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Publication number: 20070127615Abstract: An integrated circuit including: a clock signal distribution network for carrying two global clock signals traveling in opposite directions; a plurality of local clocking regions arranged along the network, each of which includes a local clock signal generation circuit that generates a local clock signal based upon the two global clock signals; and a plurality of phase detectors each of which is associated with a different one of the local clocking regions and is configured to compare the local clock signal for that local clocking region with the local clock signal for a neighboring local clocking region, wherein in each of at least some of the local clocking regions the local clock signal generation circuit is configured to align the local clock signal for that region with the local clock signal of the neighboring region when the phase detector for that local clocking region indicates a nonalignment condition exists.Type: ApplicationFiled: April 4, 2006Publication date: June 7, 2007Applicant: Applied Materials, Inc.Inventors: Vladimir Prodanov, Mihai Banu, Bryan Ackland
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Publication number: 20060273244Abstract: A circuit including: an optical detector for detecting an optical pulse and generating therefrom a current pulse on an output; a pulse detector circuit having an input electrically connected to the optical detector and having an output for outputting a detection pulse in response to detecting the current pulse on its input, said pulse detector circuit including: a resettable amplifier including an input for receiving the current pulse from the optical detector, a reset terminal for resetting the amplifier after the amplifier detects the current pulse on its input, and an output for outputting a signal from which the detection pulse is derived; and a reset delay chain feeding back to the reset terminal of the resettable amplifier a feedback signal derived from the output signal of the resettable amplifier.Type: ApplicationFiled: April 19, 2006Publication date: December 7, 2006Applicant: Applied Materials, Inc.Inventors: Behzad Razavi, Lawrence West, Bryan Ackland
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Publication number: 20060055800Abstract: An improved monolithic solid state imager comprises plural sub-arrays of respectively different kinds of pixels, an optional filter mosaic comprising color filters and clear elements, and circuitry to process the output of the pixels. The different kinds of pixels respond to respectively different spectral ranges. Advantageously the different kinds of pixels can be chosen from: 1) SWIR pixels responsive to short wavelength infrared (SWIR) in the range of approximately 800-1800 nm; 2) regular pixels responsive to visible and NIR radiation (400-1000 nm) and wideband pixels responsive to visible, NIR and SWIR radiation.Type: ApplicationFiled: August 18, 2005Publication date: March 16, 2006Inventors: Bryan Ackland, Clifford King, Conor Rafferty