Abstract: A mesh of conductors forms a grid in a multi-layered electronic device. The mesh of conductors includes (1) a first set of conductors disposed in one layer forming parallel lines in the one layer, and (2) a second set of conductors disposed in another layer forming parallel lines in the other layer. The first set of conductors is configured to provide a first voltage reference, and the second set of conductors is configured to provide a second voltage reference. At least one grid check circuit is coupled to the first set of conductors and the second set of conductors for monitoring presence and/or absence of the first or second voltage references. The parallel lines formed in the one layer and the parallel lines formed in the other layer are substantially perpendicular to each other.

Abstract: A mesh of conductors forms a grid in a multi-layered electronic device. The mesh of conductors includes (1) a first set of conductors disposed in one layer forming parallel lines in the one layer, and (2) a second set of conductors disposed in another layer forming parallel lines in the other layer. The first set of conductors is configured to provide a first voltage reference, and the second set of conductors is configured to provide a second voltage reference. At least one grid check circuit is coupled to the first set of conductors and the second set of conductors for monitoring presence and/or absence of the first or second voltage references. The parallel lines formed in the one layer and the parallel lines formed in the other layer are substantially perpendicular to each other.

Abstract: A method for making an integrated circuit characterized by: determining a range of bonding pad pitches which varies between a minimum bonding pad pitch and a maximum bonding pad pitch; setting a driver pitch to the minimum bonding pad pitch; forming a base set including a plurality of drivers having the determined driver pitch; forming customization layers over the base set, where the customization layers include a plurality of bonding pads having a pad pitch greater than the minimum bonding pad pitch but less than or equal to the maximum bonding pad pitch; and coupling some, but not all, of the drivers to the pads. As a result, a single base set can be used to make integrated circuits having a range of bonding pad pitches. The method and structure of the present invention are very well adapted for use in gate array integrated circuits.