Abstract: Alignment of a receiver clock signal with a transmitter clock signal based upon a received data signal is disclosed. Some embodiments generate, based upon of phase bits and valid phase bits, a phase signal having a voltage level selected from at least three voltage levels. One voltage level corresponds to shifting the receiver clock signal in a first direction. Another voltage level corresponds to shifting the receiver clock signal in a second direction. The other voltage level corresponds to repeating a previous shift of the receiver clock signal.