Patents by Inventor Bryan D. Preble

Bryan D. Preble has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7593202
    Abstract: An integrated circuit (300/400) includes first and second power domains and a bank of input/output (I/O) cells (305/405) coupled to the first and second power domains. The bank of I/O cells (305/405) includes a first plurality of active clamps (374/445) for the first power domain and a second plurality of active clamps (384/425) for the second power domain wherein the first (374/445) and second (384/425) pluralities of active clamps overlap along the bank of I/O cells. According to one aspect each of the plurality of input/output cells (420, 440) has a bonding pad (421, 441) for receiving an output signal referenced to a respective first power domain, and at least one ESD protection element (425, 445) for a respective second power domain. According to another aspect, each of the plurality of input/output cells (420, 440) has a bonding pad (421, 441) for receiving a respective output signal and at least one ESD protection element for each of a first power domain and a second power domain.
    Type: Grant
    Filed: November 1, 2005
    Date of Patent: September 22, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Michael G. Khazhinsky, Martin J. Bayer, James W. Miller, Bryan D. Preble