Abstract: A passive vector modulator (PVM) includes a divider that splits an input signal into a first divided signal and a second divided signal 90° apart in phase. The PVM includes a switched transformer phase shifter including primary windings to form first primary windings and second primary windings receiving the first divided signal and the second divided signal respectively. First secondary windings are coupled to the first primary windings, the first secondary windings being center-tapped and outputting first and second phase shifted output signals, phase shifted 180° and 0° respectively. Second secondary windings are coupled to the second primary windings, the second secondary windings being center-tapped and outputting third and fourth phase shifted signals, phase shifted 270° and 90° respectively. The PVM includes a switch configured to receive the phase shifted output signals. The switch selectively outputs one of the phase shifted output signals, or a combination, from the PVM.

Abstract: A passive vector modulator (PVM) includes a divider that splits an input signal into a first divided signal and a second divided signal 90° apart in phase. The PVM includes a switched transformer phase shifter including primary windings to form first primary windings and second primary windings receiving the first divided signal and the second divided signal respectively. First secondary windings are coupled to the first primary windings, the first secondary windings being center-tapped and outputting first and second phase shifted output signals, phase shifted 180° and 0° respectively. Second secondary windings are coupled to the second primary windings, the second secondary windings being center-tapped and outputting third and fourth phase shifted signals, phase shifted 270° and 90° respectively. The PVM includes a switch configured to receive the phase shifted output signals. The switch selectively outputs one of the phase shifted output signals, or a combination, from the PVM.

Abstract: A power detector with a main transconductance stage and a Gilbert switch stage coupled to one another. Current sources are coupled between the main transconductance and the Gilbert switch stages. Each of the current sources is configured to generate a cascoded PMOS trickle current under the control of a DAC to control the effective voltage of the Gilbert switch stage. This mitigates the DC offsets resulting in enhanced sensitivity of the Gilbert switch stage. An increase in the conversion gain of a system using a Gilbert switch stage, for a given LO swing, is therefore obtained for a very small increase in DC power.

Abstract: Presently disclosed is a matching network provided from a slow wave, wrapped, tapered-transformer transmission line.

Abstract: Presently disclosed is a matching network provided from a slow wave, wrapped, tapered-transformer transmission line.

Abstract: An amplifier including an amplifier transistor, and a switch transistor, wherein the amplifier is configured to be switched on and off by controlling bias voltages of the transistors.

Abstract: A hard-wired circuit (25) is provided for controlling or for monitoring a plant or process (12). The circuit incorporates means (14) to sense the current state of the process, an input encoder (16) to generate multi-digit binary coded signals representing that sensed state, and an output encoder (18) to generate multi-digit binary output coded signals corresponding to the signals from the input encoder (16), which output signals can be used to control process or plant actuators. Both the input encoder (16) and the output encoder (18) may be PROMs. A complement modulator (20) activated by an oscillator (24) may be used to provide dynamic output signals; and by means of appropriate comparators (26, 38) and watchdogs (28, 40) the input and output coded signals may be verified.