Patents by Inventor Bryan J. Gielarowski

Bryan J. Gielarowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170149638
    Abstract: Individual wire defects in a data transfer/communication system that employs differential signaling can be detected during connectivity verification of a link prior to link training by individually disconnecting wires by wire polarity and testing the link. For example, the positive transmit wire of a lane may be verified by disconnecting the negative transmit wire of the lane and performing link connectivity verification. If the link passes connectivity verification, then the positive transmit wire of the lane is functioning normally.
    Type: Application
    Filed: December 16, 2016
    Publication date: May 25, 2017
    Inventors: Bryan J. Gielarowski, Richard M. Strong, Hor-Lam Cheuk
  • Patent number: 9544209
    Abstract: Individual wire defects in a data transfer/communication system that employs differential signaling can be detected during connectivity verification of a link prior to link training by individually disconnecting wires by wire polarity and testing the link. For example, the positive transmit wire of a lane may be verified by disconnecting the negative transmit wire of the lane and performing link connectivity verification. If the link passes connectivity verification, then the positive transmit wire of the lane is functioning normally. Connectivity of the negative transmit wire of the lane may then be verified by disconnecting the positive transmit wire of the lane and determining if the passes the connectivity verification.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: January 10, 2017
    Assignee: NetApp, Inc.
    Inventors: Bryan J. Gielarowski, Richard M. Strong, Hor-Lam Cheuk
  • Publication number: 20160282414
    Abstract: JTAG testing can be facilitated by providing loopbacks in a circuit that lacks a JTAG interface. A loopback may be created by connecting a receiving pin to a transmit pin of a circuit that lacks the JTAG interface. The loopback would cause a test value received in the circuit to be transmitted back out of the circuit. Therefore, a test value may be sent from an integrated circuit with a JTAG interface and then read back at the same integrated circuit with the JTAG interface. Using a loopback allows the interconnects between two integrated circuits to be tested despite one integrated circuit lacking a JTAG interface. Using the loopback also frees up pins for one of the integrated circuits that would otherwise be used by the JTAG interface.
    Type: Application
    Filed: March 23, 2015
    Publication date: September 29, 2016
    Inventors: Bryan J. Gielarowski, Hor-Lam Cheuk, Richard M. Strong
  • Publication number: 20160285715
    Abstract: Individual wire defects in a data transfer/communication system that employs differential signaling can be detected during connectivity verification of a link prior to link training by individually disconnecting wires by wire polarity and testing the link. For example, the positive transmit wire of a lane may be verified by disconnecting the negative transmit wire of the lane and performing link connectivity verification. If the link passes connectivity verification, then the positive transmit wire of the lane is functioning normally. Connectivity of the negative transmit wire of the lane may then be verified by disconnecting the positive transmit wire of the lane and determining if the passes the connectivity verification.
    Type: Application
    Filed: March 23, 2015
    Publication date: September 29, 2016
    Inventors: Bryan J. Gielarowski, Richard M. Strong, Hor-Lam Cheuk