Patents by Inventor Bryan M. Willman
Bryan M. Willman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9313197Abstract: A method of assessing risk in an electronic transaction involves assignment of quality attributes to cryptographic identities presented in a digital transaction. The quality assignment supports assessment of risk in the transaction. The evaluation of risk in the transaction is made by assessing machine readable attributes of the digital identities along with transaction details. The digital identity attributes may be constructed using extensions of existing standards. A guarantee against risk of loss may be obtained by procuring insurance on the transaction before execution. Third party insurers may analyze the risk of loss in a transaction by assessing the attributes of digital identities along with transaction details and may provide a requestor with an insurance premium quote. Based on the value of the quote, the transaction participants may decide whether or not to execute the transaction.Type: GrantFiled: February 23, 2015Date of Patent: April 12, 2016Assignee: Microsoft Technology Licensing, LLCInventors: Michael A. Aday, Bryan M. Willman
-
Publication number: 20150172278Abstract: A method of assessing risk in an electronic transaction involves assignment of quality attributes to cryptographic identities presented in a digital transaction. The quality assignment supports assessment of risk in the transaction. The evaluation of risk in the transaction is made by assessing machine readable attributes of the digital identities along with transaction details. The digital identity attributes may be constructed using extensions of existing standards. A guarantee against risk of loss may be obtained by procuring insurance on the transaction before execution. Third party insurers may analyze the risk of loss in a transaction by assessing the attributes of digital identities along with transaction details and may provide a requestor with an insurance premium quote. Based on the value of the quote, the transaction participants may decide whether or not to execute the transaction.Type: ApplicationFiled: February 23, 2015Publication date: June 18, 2015Inventors: Michael A. Aday, Bryan M. Willman
-
Patent number: 8966245Abstract: A method of assessing risk in an electronic transaction involves assignment of quality attributes to cryptographic identities presented in a digital transaction. The quality assignment supports assessment of risk in the transaction. The evaluation of risk in the transaction is made by assessing machine readable attributes of the digital identities along with transaction details. The digital identity attributes may be constructed using extensions of existing standards. A guarantee against risk of loss may be obtained by procuring insurance on the transaction before execution. Third party insurers may analyze the risk of loss in a transaction by assessing the attributes of digital identities along with transaction details and may provide a requestor with an insurance premium quote. Based on the value of the quote, the transaction participants may decide whether or not to execute the transaction.Type: GrantFiled: January 30, 2004Date of Patent: February 24, 2015Assignee: Microsoft Technology Licensing, Inc.Inventors: Michael A. Aday, Bryan M. Willman
-
Patent number: 8279415Abstract: A method and apparatus for measuring a distance are disclosed. A measuring device includes a timer, a counter, an optical emitter, an optical receiver, and a distance computing element. In one embodiment, the timer provides a sequence of signals and the counter counts pulses in a loop. The loop includes an electrical path and an optical path. While an optical emitter such as a laser can emit outgoing beams, an optical receiver such as a photodiode receives return beams from the reflective surface. The reflective surface reflects the return beam in accordance with the outgoing beam. The distance computing element measures a distance in response to the outgoing and return beams.Type: GrantFiled: February 13, 2009Date of Patent: October 2, 2012Inventors: Robert Welland, Bryan M. Willman
-
Publication number: 20100208233Abstract: A method and apparatus for measuring a distance are disclosed. A measuring device includes a timer, a counter, an optical emitter, an optical receiver, and a distance computing element. In one embodiment, the timer provides a sequence of signals and the counter counts pulses in a loop. The loop includes an electrical path and an optical path. While an optical emitter such as a laser can emit outgoing beams, an optical receiver such as a photodiode receives return beams from the reflective surface. The reflective surface reflects the return beam in accordance with the outgoing beam. The distance computing element measures a distance in response to the outgoing and return beams.Type: ApplicationFiled: February 13, 2009Publication date: August 19, 2010Inventors: Robert Welland, Bryan M. Willman
-
Patent number: 7543293Abstract: Described is a system and method whereby processes may have multiple memory maps associated therewith to provide curtained memory and overcome other memory-related problems. Multiple maps are used to restrict memory access of existing code such as drivers, without changing that code, and without changing existing microprocessors. A thread of a process is associated with one memory map at a time, which by mapping to different memory locations, provides memory isolation without requiring a process switch. Memory isolation may be combined with controlled, closed memory map switching performed only by trusted code, to ensure that some protected memory is inaccessible to all but the trusted code (curtained memory). For example, the threads of the process may ordinarily run at one privilege level with a restricted map, with map switching is only allowed at a higher privilege level.Type: GrantFiled: December 27, 2005Date of Patent: June 2, 2009Assignee: Microsoft CorporationInventor: Bryan M. Willman
-
Patent number: 7370199Abstract: A method of controlling information exposure in a multiparty transaction includes an originating transaction participant cryptographically encoding all information for each of the transaction participants such that a unique data content and encryption are used for each of the messages destined to the other transaction participants. The cryptographically encoded messages are transmitted to the transaction participants such that each may decrypt their message and respond to a primary transaction participant with status concerning their portion of the transaction. After reception of affirmative status messages from the transaction participants, the primary transaction participant may transmit messages to the responding transaction participants to execute the multiparty transaction. The originating transaction participant may also be provided an indication that the multiparty transaction is executed.Type: GrantFiled: January 28, 2004Date of Patent: May 6, 2008Assignee: Microsoft CorporationInventors: Michael A. Aday, Bryan M. Willman, Marcus Peinado, Alan S. Geller
-
Patent number: 7073173Abstract: Described is a system and method whereby processes may have multiple memory maps associated therewith to provide curtained memory and overcome other memory-related problems. Multiple maps are used to restrict memory access of existing code such as drivers, without changing that code, and without changing existing microprocessors. A thread of a process is associated with one memory map at a time, which by mapping to different memory locations, provides memory isolation without requiring a process switch. Memory isolation may be combined with controlled, closed memory map switching performed only by trusted code, to ensure that some protected memory is inaccessible to all but the trusted code (curtained memory). Map switching among multiple maps eliminates the need to change a process in order to access different memory, thereby allowing expanded memory addressing in a single process and isolating untrusted code run in process from certain memory of that process.Type: GrantFiled: July 26, 2001Date of Patent: July 4, 2006Assignee: Microsoft CorporationInventor: Bryan M. Willman
-
Patent number: 6745306Abstract: A method and system for protecting data on a computer system uses one or more restricted areas of memory to store proprietary or confidential data. The translation lookaside buffer (TLB) is used to regulate access to the restricted memory. When a TLB miss occurs during the execution of a program, the TLB miss handling logic determines whether the program is attempting to access restricted memory. If so, then the TLB miss handling logic determines whether the program is authorized to have access. If the program is not authorized to have access, then the TLB miss handling logic generates an exception, such as an invalid page fault, and the TLB is not loaded. If the program is authorized to have access to the restricted page, then the TLB is loaded with the appropriate address translation. As long as the translation remains in the TLB, future accesses to the page by an authorized program will require no additional checks and no additional CPU time.Type: GrantFiled: March 7, 2000Date of Patent: June 1, 2004Assignee: Microsoft CorporationInventors: Bryan M. Willman, Paul England, John D. DeTreville
-
Patent number: 6529966Abstract: A method and system provides for booting a computer system after configuration data becomes unusable. One method and system provides for booting the computer system from a set of configuration data that last booted the system properly. An embodiment is directed to attempting to boot the computer system from a first set of configuration data, and, if the attempt is unsuccessful, automatically booting the computer system using the second set of configuration data which successfully booted the computer system and was previously stored. In response to a successful boot of the computer system using the first set of configuration data, an embodiment is directed to updating second set of configuration data so that it is equivalent to the first set of configuration data as the second set of configuration data that successfully booted the computer system.Type: GrantFiled: August 24, 1995Date of Patent: March 4, 2003Assignee: Microsoft CorporationInventors: Bryan M. Willman, Dan Alvin Hinsley, John David Vert, David Otto Hovel, Rita Mang Chee Wong
-
Patent number: 5497492Abstract: A method in a computer system for loading an operating system into memory through use of a file system that is stored on secondary storage. The operating system is stored on secondary storage as files with file names. Before the operating system is loaded into memory, a bootstrap program loads the file system from secondary storage into memory. The file system is stored at locations in secondary storage that are known to the bootstrap program. The file system also has a mapping of file names of operating system files to locations in secondary storage that contain the operating system files. After loading the file system, the bootstrap program requests the loaded file system to load the operating system files by specifying the file names of the operating system files to be loaded. In response to the request, the file system uses the mapping to retrieve the locations in secondary storage of the operating system files specified by the file names.Type: GrantFiled: September 8, 1993Date of Patent: March 5, 1996Assignee: Microsoft CorporationInventors: Mark J. Zbikowski, Alan R. Whitney, Rajen J. Shah, Bryan M. Willman, J. Gordon Letwin
-
Patent number: 5418956Abstract: An improved method and system for reducing the number of segment register loads that occur during the transfer of control from an application program to an operating system routine is provided. In preferred embodiments on an Intel 80386 processor, an application program and operating system kernel share a code segment address space and a data segment address space from 0 to 4G. During the execution of the application program, which executes in user mode, a page table is defined to prevent the application program from accessing pages which correspond to the address space of 2G to 4G. When the application program invokes a system routine, the system routine does not need to load the data segment register since the application program and the kernel share the same data segment. If an application program does load the data segment register with a selector other than the selector for the shared data segment, then when the kernel tries to access memory using the data segment register, an exception is generated.Type: GrantFiled: February 26, 1992Date of Patent: May 23, 1995Assignee: Microsoft CorporationInventor: Bryan M. Willman
-
Patent number: 5363487Abstract: A method and apparatus interfaces a computer operating system with a storage volume, which is all or part of a data storage media such as a removable floppy-type disk or a hard disk. In a preferred embodiment, the method and apparatus select and associate the appropriate one of a plurality of system drivers with a respective storage volume to permit data communication between the storage volume and the operating system. The method and apparatus permit a single operating system to access a storage medium formatted in accordance with differing file systems, without reprogramming or otherwise altering the operating system. Generally, the operating system identifies which of the plurality of file system drivers is appropriate for reading a particular storage volume and, thereafter, associates the identified file system driver with the particular storage volume.Type: GrantFiled: August 29, 1989Date of Patent: November 8, 1994Assignee: Microsoft CorporationInventors: Bryan M. Willman, Mark J. Zbikowski, James G. Letwin, Rajen J. Shah