Patents by Inventor Bryan S. Shelton

Bryan S. Shelton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110101371
    Abstract: A gallium nitride based semiconductor Schottky diode fabricated from a n+ doped GaN layer having a thickness between one and six microns disposed on a sapphire substrate; an n? doped GaN layer having a thickness greater than one micron disposed on said n+ GaN layer patterned into a plurality of elongated fingers and a metal layer disposed on the n? doped GaN layer and forming a Schottky junction therewith. The layer thicknesses and the length and width of the elongated fingers are optimized to achieve a device with breakdown voltage of greater than 500 volts, current capacity in excess of one ampere, and a forward voltage of less than three volts.
    Type: Application
    Filed: December 30, 2010
    Publication date: May 5, 2011
    Applicant: Power Integrations, Inc.
    Inventors: TingGang Zhu, Bryan S. Shelton, Marek K. Pabisz, Mark Gottfried, Linlin Liu, Milan Pophristic, Michael Murphy, Rick Stall
  • Patent number: 7863172
    Abstract: A gallium nitride based semiconductor Schottky diode fabricated from a n+ doped GaN layer having a thickness between one and six microns disposed on a sapphire substrate; an n? doped GaN layer having a thickness greater than one micron disposed on said n+ GaN layer patterned into a plurality of elongated fingers and a metal layer disposed on the n? doped GaN layer and forming a Schottky junction therewith. The layer thicknesses and the length and width of the elongated fingers are optimized to achieve a device with breakdown voltage of greater than 500 volts, current capacity in excess of one ampere, and a forward voltage of less than three volts.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: January 4, 2011
    Assignee: Power Integrations, Inc.
    Inventors: TingGang Zhu, Bryan S. Shelton, Marek K. Pabisz, Mark Gottfried, Linlin Liu, Milan Pophristic, Michael Murphy, Richard A. Stall
  • Patent number: 7842547
    Abstract: In a method for fabricating a flip-chip light emitting diode device, epitaxial layers are deposited on a sapphire growth substrate to produce an epitaxial wafer. A plurality of light emitting diode devices are fabricated on the epitaxial wafer. The epitaxial wafer is diced to generate a device die. The device die is flip chip bonded to a mount. The flip chip bonding includes securing the device die to the mount by bonding at least one electrode of the device die to at least one bonding pad of the mount. Subsequent to the flip chip bonding, the growth substrate of the device die is removed via the application of laser light.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: November 30, 2010
    Assignee: Lumination LLC
    Inventors: Bryan S. Shelton, Sebastien Libon, Ivan Eliashevich
  • Publication number: 20100140627
    Abstract: A packaged semiconductor device including a semiconductor die mounted on a header of a leadframe. A plurality of spaced external conductors extends from the header and at least one of the external conductors has a bond wire post at one end thereof such that a bonding wire extends between the bond wire post and the semiconductor die. The package device also includes a housing, which encloses the semiconductor die, the header, the bonding wire and the bonding wire post resulting in an insulated packaged device.
    Type: Application
    Filed: October 8, 2009
    Publication date: June 10, 2010
    Inventors: Bryan S. Shelton, Marek K. Pabisz, TingGang Zhu, Linlin Liu, Boris Peres
  • Publication number: 20090035925
    Abstract: A gallium nitride based semiconductor Schottky diode fabricated from a n+ doped GaN layer having a thickness between one and six microns disposed on a sapphire substrate; an n? doped GaN layer having a thickness greater than one micron disposed on said n+ GaN layer patterned into a plurality of elongated fingers and a metal layer disposed on the n? doped GaN layer and forming a Schottky junction therewith. The layer thicknesses and the length and width of the elongated fingers are optimized to achieve a device with breakdown voltage of greater than 500 volts, current capacity in excess of one ampere, and a forward voltage of less than three volts.
    Type: Application
    Filed: October 10, 2008
    Publication date: February 5, 2009
    Inventors: TingGang Zhu, Bryan S. Shelton, Marek K. Pabisz, Mark Gottfried, Linlin Liu, Milan Pophristic, Michael Murphy, Richard A. Stall
  • Patent number: 7436039
    Abstract: A gallium nitride based semiconductor Schottky diode fabricated from a n+ doped GaN layer having a thickness between one and six microns disposed on a sapphire substrate; an n? doped GaN layer having a thickness greater than one micron disposed on said n+ GaN layer patterned into a plurality of elongated fingers and a metal layer disposed on the n? doped GaN layer and forming a Schottky junction therewith. The layer thicknesses and the length and width of the elongated fingers are optimized to achieve a device with breakdown voltage of greater than 500 volts, current capacity in excess of one ampere, and a forward voltage of less than three volts.
    Type: Grant
    Filed: January 6, 2005
    Date of Patent: October 14, 2008
    Assignee: Velox Semiconductor Corporation
    Inventors: TingGang Zhu, Bryan S. Shelton, Marek K. Pabisz, Mark Gottfried, Linlin Liu, Milan Pophristic, Michael Murphy, Richard A. Stall
  • Publication number: 20080113460
    Abstract: In a method for fabricating a flip-chip light emitting diode device, epitaxial layers are deposited on a sapphire growth substrate to produce an epitaxial wafer. A plurality of light emitting diode devices are fabricated on the epitaxial wafer. The epitaxial wafer is diced to generate a device die. The device die is flip chip bonded to a mount. The flip chip bonding includes securing the device die to the mount by bonding at least one electrode of the device die to at least one bonding pad of the mount. Subsequent to the flip chip bonding, the growth substrate of the device die is removed via the application of laser light.
    Type: Application
    Filed: December 21, 2004
    Publication date: May 15, 2008
    Inventors: Bryan S. Shelton, Sebastien Libon, Ivan Eliashevich
  • Patent number: 7285801
    Abstract: A light emitting semiconductor device die (10, 110, 210, 310) includes an electrically insulating substrate (12, 112). First and second spatially separated electrodes (60, 62, 260, 262, 360, 362) are disposed on the electrically insulating substrate. The first and second electrodes define an electrical current flow direction directed from the first electrode to the second electrode. A plurality of light emitting diode mesas (30, 130, 130?, 230, 330) are disposed on the substrate between the first and second spatially separated electrodes. Electrical series interconnections (50, 150, 250, 350) are disposed on the substrate between neighboring light emitting diode mesas. Each series interconnection carries electrical current flow between the neighboring mesas in the electrical current flow direction.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: October 23, 2007
    Assignee: Lumination, LLC
    Inventors: Ivan Eliashevich, Chris Bohler, Bryan S. Shelton, Hari S. Venugopalan, Xiang Gao
  • Patent number: 7253015
    Abstract: A repeatable and uniform low doped layer is formed using modulation doping by forming alternating sub-layers of doped and undoped nitride semiconductor material atop another layer. A Schottky diode is formed of such a low doped nitride semiconductor layer disposed atop a much more highly doped nitride semiconductor layer. The resulting device has both a low on-resistance when the device is forward biased and a high breakdown voltage when the device is reverse biased.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: August 7, 2007
    Assignee: Velox Semiconductor Corporation
    Inventors: Milan Pophristic, Michael Murphy, Richard A. Stall, Bryan S. Shelton, Linlin Liu, Alex D. Ceruzzi
  • Patent number: 7229866
    Abstract: A guard ring is formed in a semiconductor region that is part of a Schottky junction or Schottky diode. The guard ring is formed by ion implantation into the semiconductor contact layer without completely annealing the semiconductor contact layer to form a high resistance region. The guard ring may be located at the edge of the layer or, alternatively, at a distance away from the edge of the layer. A Schottky metal contact is formed atop the layer, and the edges of the Schottky contact are disposed atop the guard ring.
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: June 12, 2007
    Assignee: Velox Semiconductor Corporation
    Inventors: Ting Gang Zhu, Bryan S. Shelton, Alex D. Ceruzzi, Linlin Liu, Michael Murphy, Milan Pophristic
  • Patent number: 7179670
    Abstract: A light emitting diode (10) has a backside and a front-side with at least one n-type electrode (14) and at least one p-type electrode (12) disposed thereon defining a minimum electrodes separation (delectrodes). A bonding pad layer (50) includes at least one n-type bonding pad (64) and at least one p-type bonding pad (62) defining a minimum bonding pads separation (dpads) that is larger than the minimum electrodes separation (delectrodes). At least one fanning layer (30) interposed between the front-side of the light emitting diode (10) and the bonding pad layer (50) includes a plurality of electrically conductive paths passing through vias (34, 54) of a dielectric layer (32, 52) to provide electrical communication between the at least one n-type electrode (14) and the at least one n-type bonding pad (64) and between the at least one p-type electrode (12) and the at least one p-type bonding pad (62).
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: February 20, 2007
    Assignee: GELcore, LLC
    Inventors: Bryan S. Shelton, Sebastien Libon, Hari S. Venugopalan, Ivan Eliashevich, Stanton E. Weaver, Jr., Chen-Lun Hsing Chen, Thomas F. Soules, Steven LeBoeuf, Stephen Arthur
  • Patent number: 7115896
    Abstract: A nitride semiconductor is grown on a silicon substrate by depositing a few mono-layers of aluminum to protect the silicon substrate from ammonia used during the growth process, and then forming a nucleation layer from aluminum nitride and a buffer structure including multiple superlattices of AlRGa(1-R)N semiconductors having different compositions and an intermediate layer of GaN or other Ga-rich nitride semiconductor. The resulting structure has superior crystal quality. The silicon substrate used in epitaxial growth is removed before completion of the device so as to provide superior electrical properties in devices such as high-electron mobility transistors.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: October 3, 2006
    Assignee: Emcore Corporation
    Inventors: Shiping Guo, David Gotthold, Milan Pophristic, Boris Peres, Ivan Eliashevich, Bryan S. Shelton, Alex D. Ceruzzi, Michael Murphy, Richard A. Stall
  • Patent number: 7116567
    Abstract: A converter is provided having an AC input and a DC output. The converter includes a rectifier that receives the AC input and that provides a rectifier output, a series connected current to magnetic field energy storage device and current interrupter connected across the rectifier output and a series connected gallium nitride diode and output charge storage device connected between a midpoint of the series connected magnetic field energy storage device and current interrupter and a terminal of the rectifier output and wherein the converter is characterized in not needing a transient voltage suppression circuit.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: October 3, 2006
    Assignee: Velox Semiconductor Corporation
    Inventors: Bryan S. Shelton, Boris Peres, Daniel McGlynn
  • Patent number: 7087463
    Abstract: In a light emitting package fabrication process, a plurality of light emitting chips (10) are attached on a sub-mount wafer (14). The attached light emitting chips (10) are encapsulated. Fracture-initiating trenches (30, 32) are laser cut into the sub-mount wafer (14) between the attached light emitting chips (10) using a laser. The sub-mount wafer (14) is fractured along the fracture initiating trenches (30, 32).
    Type: Grant
    Filed: August 4, 2004
    Date of Patent: August 8, 2006
    Assignee: GELcore, LLC
    Inventors: Michael Sackrison, Xiang Gao, Bryan S. Shelton, Ivan Eliashevich
  • Patent number: 7084475
    Abstract: A lateral conduction Schottky diode includes multiple mesa regions upon which Schottky contacts are formed and which are at least separated by ohmic contacts to reduce the current path length and reduce current crowding in the Schottky contact, thereby reducing the forward resistance of a device. The multiple mesas may be isolated from one another and have sizes and shapes optimized for reducing the forward resistance. Alternatively, some of the mesas may be finger-shaped and intersect with a central mesa or a bridge mesa, and some or all of the ohmic contacts are interdigitated with the finger-shaped mesas. The dimensions of the finger-shaped mesas and the perimeter of the intersecting structure may be optimized to reduce the forward resistance. The Schottky diodes may be mounted to a submount in a flip chip arrangement that further reduces the forward voltage as well as improves power dissertation and reduces heat generation.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: August 1, 2006
    Assignee: Velox Semiconductor Corporation
    Inventors: Bryan S. Shelton, Linlin Liu, Alex D. Ceruzzi, Michael Murphy, Milan Pophristic, Boris Peres, Richard A. Stall, Xiang Gao, Ivan Eliashevich
  • Patent number: 7064356
    Abstract: A flip chip light emitting diode (12) includes a light-transmissive substrate (10) with a base semiconducting layer (40) disposed thereupon. A conductive mesh (18) is disposed on the base semiconducting layer (40) and is in electrically conductive contact therewith. Light-emitting micromesas (30) are disposed in openings (20) of the conductive mesh (18). Each light emitting micromesa (30) has a topmost layer (46) of a second conductivity type that is opposite the first conductivity type. A first conductivity type electrode (14) is disposed on the base semiconducting layer (40) and is in electrical communication with the electrically conductive mesh (18). An insulating layer (60) is disposed over the electrically conductive mesh (18). A second conductivity type electrode layer (24) is disposed over the insulating layer (60) and the light-emitting micromesas (30). the insulating layer (60) insulates the second conductivity type electrode layer (24) from the electrically conductive mesh (18).
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: June 20, 2006
    Assignee: GELcore, LLC
    Inventors: Emil P. Stefanov, Hari S. Venugopalan, Bryan S. Shelton, Ivan Eliashevich
  • Patent number: 6849524
    Abstract: A method of protecting and cleaning a semiconductor wafer using laser ablation includes the following steps: applies a protective coating on the side to be cut of a wafer with sapphire substrate, mounts the other side of the sapphire wafer on an adhesive tape, mounts the sapphire wafer on a cutting table, cuts the sapphire wafer with a laser, breaks the sapphire wafer into die, and cleans the sapphire wafer with a cleaning solution that removes slag resulting from the cutting, debris resulting from the breaking, and the protective coating, but the adhesive tape, the cleaning solution, and the protective coating are selected such that the cleaning solution does not damage the adhesive tape.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: February 1, 2005
    Inventors: Bryan S. Shelton, Mark Gottfried, Stephen Schwed, Ivan Eliashevich
  • Publication number: 20040119063
    Abstract: A nitride semiconductor is grown on a silicon substrate by depositing a few mono-layers of aluminum to protect the silicon substrate from ammonia used during the growth process, and then forming a nucleation layer from aluminum nitride and a buffer structure including multiple superlattices of AlRGa(1−R)N semiconductors having different compositions and an intermediate layer of GaN or other Ga-rich nitride semiconductor. The resulting structure has superior crystal quality. The silicon substrate used in epitaxial growth is removed before completion of the device so as to provide superior electrical properties in devices such as high-electron mobility transistors.
    Type: Application
    Filed: November 25, 2003
    Publication date: June 24, 2004
    Applicant: Emcore Corporation
    Inventors: Shiping Guo, David Gotthold, Milan Pophristic, Boris Peres, Ivan Eliashevich, Bryan S. Shelton, Alex D. Ceruzzi, Michael Murphy, Richard A. Stall
  • Publication number: 20020127824
    Abstract: A method of protecting and cleaning a semiconductor wafer using laser ablation includes the following steps: applies a protective coating on the side to be cut of a wafer with sapphire substrate, mounts the other side of the sapphire wafer on an adhesive tape, mounts the sapphire wafer on a cutting table, cuts the sapphire wafer with a laser, breaks the sapphire wafer into die, and cleans the sapphire wafer with a cleaning solution that removes slag resulting from the cutting, debris resulting from the breaking, and the protective coating, but the adhesive tape, the cleaning solution, and the protective coating are selected such that the cleaning solution does not damage the adhesive tape.
    Type: Application
    Filed: May 2, 2002
    Publication date: September 12, 2002
    Inventors: Bryan S. Shelton, Mark Gottfried, Stephen Schwed, Ivan Eliashevich