Abstract: In one embodiment, an apparatus comprises a storage device to receive, from a computing host, a request to append data to a data log. The storage device is further to identify a memory location after a last segment of the data log, append the data to the data log by writing the data to the memory location after the last segment of the data log, and provide, to the computing host, a key comprising an identification of the memory location at which the data was appended to the data log.

Abstract: In one embodiment, an apparatus comprises a storage device to receive, from a computing host, a request to append data to a data log. The storage device is further to identify a memory location after a last segment of the data log, append the data to the data log by writing the data to the memory location after the last segment of the data log, and provide, to the computing host, a key comprising an identification of the memory location at which the data was appended to the data log.

Abstract: Some embodiments of the invention includes a data generator. The data generator includes a data generating circuit having a combination of linear feedback shift registers and shift registers for generating a pseudo-random data pattern in a first order. The data generator also includes a recovery circuit for allowing the data generating circuit to generate the pseudo-random data pattern in a second order. The second order is a reverse of the first order. Other embodiments are described and claimed.

Abstract: Some embodiments of the invention includes a data generator. The data generator includes a data generating circuit having a combination of linear feedback shift registers and shift registers for generating a pseudo-random data pattern in a first order. The data generator also includes a recovery circuit for allowing the data generating circuit to generate the pseudo-random data pattern in a second order. The second order is a reverse of the first order. Other embodiments are described and claimed.

Abstract: A memory system and method includes a memory hub controller coupled to a plurality of memory modules through a high-speed link. Each of the memory modules includes a memory hub coupled to a plurality of memory devices. The memory hub controller issues a command to open a page in a memory device in one memory module at the same time that a page is open in a memory device in another memory module. In addition to opening pages of memory devices in two or more memory modules, the pages that are simultaneously open may be in different ranks of memory devices in the same memory module and/or in different banks of memory cells in the same memory device. As a result, the memory system is able to provide an virtual page having a very large effective size.