Abstract: A control device for controlling a memory device to process requests from a plurality of hosts may include a request controller configured to manage a set representing storage space allocated to each of the plurality of the hosts; and a set controller configured to monitor requests from the plurality of hosts and to adjust size of the set, wherein, when the request is a write request from a host among the plurality of hosts, the request controller selects a target physical address among physical addresses included in the set allocated to the host, the target physical address indicating where the request is to be processed.

Abstract: A semiconductor device may include a task controller configured to generate a target share for a plurality of task generators according to respective target states and respective measured states of the plurality of task generators, a task scheduler configured to schedule the plurality of tasks according to an allocated share, the plurality of tasks being provided from the plurality of task generators, and a share controller configured to determine the allocated share according to the target share and a measured share of the plurality of task generators.

Abstract: A control device for controlling a memory device to process requests from a plurality of hosts may include a request controller configured to manage a set representing storage space allocated to each of the plurality of the hosts; and a set controller configured to monitor requests from the plurality of hosts and to adjust size of the set, wherein, when the request is a write request from a host among the plurality of hosts, the request controller selects a target physical address among physical addresses included in the set allocated to the host, the target physical address indicating where the request is to be processed.

Abstract: A semiconductor device may include a task controller configured to generate a target share for a plurality of task generators according to respective target states and respective measured states of the plurality of task generators, a task scheduler configured to schedule the plurality of tasks according to an allocated share, the plurality of tasks being provided from the plurality of task generators, and a share controller configured to determine the allocated share according to the target share and a measured share of the plurality of task generators.

Abstract: Provided are a flash memory system and a driving method thereof. A flash memory device according to an embodiment of the present invention includes a memory cell array including a plurality of memory cells, and a control logic. The control logic performs control for one-bit information to be stored in the plurality of memory cells. The control logic controls storing data in the plurality of memory cells multiple times without an erasion operation. Accordingly, the flash memory device does not execute an erasion operation, increasing an operation speed.

Abstract: Provided are a flash memory system and a driving method thereof. A flash memory device according to an embodiment of the present invention includes a memory cell array including a plurality of memory cells, and a control logic. The control logic performs control for one-bit information to be stored in the plurality of memory cells. The control logic controls storing data in the plurality of memory cells multiple times without an erasion operation. Accordingly, the flash memory device does not execute an erasion operation, increasing an operation speed.