Abstract: A system having an acquisition device for acquiring test and measurement data. For each input data signal, the acquisition device has two differential receivers of opposite polarity each having an output coupled to the input of different ones of two pairs of registers, resulting in four registers sampling the input data signal periodically at four different times in accordance with two clocking signals of different phase (phase shifted) 90° to provide a sampling rate four times the rate of the clocking signals. The resulting sample data is stored in memory along with downsampled data. A computer system can request readout of stored sample data and/or downsampled data during or after acquisition of sample data and downsampled data. The acquisition device preferably utilizes an FPGA to provide sampling, storage and readout of stored data. The FPGA may be reconfigurable to provide one of different data acquiring modes selectable by a user.

Abstract: A system having an acquisition device for acquiring test and measurement data and providing such data to a computer system for display of such data. For each input data signal, the acquisition device has two differential receivers of opposite polarity each having an output coupled to the input of different ones of two pairs of registers, resulting in four registers sampling the input data signal periodically at four different times in accordance with two clocking signals of different phase (phase shifted 90°) to provide a sampling rate four times the rate of the clocking signals. The resulting sample data is stored in memory of the acquisition device along with downsampled data representing a compressed, low resolution, version of the sample data which records toggling in the sample data notwithstanding such downsampling. The computer system can request readout of stored sample data and/or downsampled data during or after acquisition of sample data and downsampled data.