Abstract: An embodiment of a semiconductor apparatus may include technology to determine one or more logical block addresses for a persistent storage media, determine one or more addresses for a physical memory space, and define a memory-mapped input/output region for the physical memory space with a direct mapping between the one or more addresses for the physical memory space and the one or more logical block addresses for the persistent storage media. Other embodiments are disclosed and claimed.

Abstract: An embodiment of a semiconductor apparatus may include technology to determine one or more logical block addresses for a persistent storage media, determine one or more addresses for a physical memory space, and define a memory-mapped input/output region for the physical memory space with a direct mapping between the one or more addresses for the physical memory space and the one or more logical block addresses for the persistent storage media. Other embodiments are disclosed and claimed.

Abstract: A computer system may comprise a plurality of cores that may process the tasks determined by the operating system. A network device may direct a first set of packets to a first core using a flow-spreading technique such as receive side scaling (RSS). However, the operating system may re-provision a task from the first core to a second core to balance the load, for example, on the computer system. The operating system may determine an identifier of the second core using a new data field in the socket calls to track the identifier of the second core. The operating system may provide the identifier of the second core to a network device. The network device may then direct a second set of packets to the second core using the identifier of the second core.

Abstract: In one embodiment, the present invention includes a method for receiving a first packet associated with a first network flow in a first descriptor queue associated with a first hardware thread, receiving a marker in the first descriptor queue to indicate migration of the first network flow from the first hardware thread to a second hardware thread, and processing a second packet of the first network flow following the first packet in order in the second hardware thread.

Abstract: A computer system may comprise a plurality of cores that may process the tasks determined by the operating system. A network device may direct a first set of packets to a first core using a flow-spreading technique such as receive side scaling (RSS). However, the operating system may re-provision a task from the first core to a second core to balance the load, for example, on the computer system. The operating system may determine an identifier of the second core using a new data field in the socket calls to track the identifier of the second core. The operating system may provide the identifier of the second core to a network device. The network device may then direct a second set of packets to the second core using the identifier of the second core.

Abstract: In one embodiment, the present invention includes a method for receiving a first packet associated with a first network flow in a first descriptor queue associated with a first hardware thread, receiving a marker in the first descriptor queue to indicate migration of the first network flow from the first hardware thread to a second hardware thread, and processing a second packet of the first network flow following the first packet in order in the second hardware thread.

Abstract: Techniques are described that can be used to implement a network interface. A network interface may be communicatively coupled to a general purpose core or hardware thread. Various operations can be assigned to be performed by the general purpose core, thereby at least to provide flexible operation of the network interface. The general purpose core may be capable to issue inter-processor interrupts to other cores or hardware threads to request processing. The other cores or hardware threads may respond to inter-processor interrupts by executing one or more interrupt service routine. The other cores or hardware threads may be capable to process network protocol units received by the network interface.