Abstract: A memory controller and a physical interface layer may accommodate multiple memory types. In some examples, the memory controller and/or PHY may include a register that includes operating parameters for multiple operating modes. Different operating modes may be compatible with different memory types. In some examples, the memory controller and physical interface may be included in a system for testing multiple memory types. The system may provide multiple interfaces for communicating with the memory. The different communication types may be used for performing different tests and/or simulating different types of devices that may utilize the memory.

Abstract: Methods, systems, and devices for address obfuscation for memory are described. A mapping function may map a logical address of data to a physical address of a memory cell. The mapping function may be implemented with a mapping component that includes mapping subcomponents. Each mapping subcomponent may be independently configurable to implement a logic function for determining a bit of the physical address. The mapping function may vary across memory devices or aspects of memory device, and in some cases may vary over time.

Abstract: Methods, apparatuses and systems related to protecting an apparatus against unauthorized accesses or usages are described. The apparatus may include a data protection circuit that protects an operating state of the apparatus, data stored in the apparatus, or a combination thereof when a temperature of the apparatus is outside of an operating range thereof.

Abstract: Methods, systems, and devices for address obfuscation for memory are described. A mapping function may map a logical address of data to a physical address of a memory cell. The mapping function may be implemented with a mapping component that includes mapping subcomponents. Each mapping subcomponent may be independently configurable to implement a logic function for determining a bit of the physical address. The mapping function may vary across memory devices or aspects of memory device, and in some cases may vary over time.

Abstract: Methods, systems, and devices for address obfuscation for memory are described. A mapping function may map a logical address of data to a physical address of a memory cell. The mapping function may be implemented with a mapping component that includes mapping subcomponents. Each mapping subcomponent may be independently configurable to implement a logic function for determining a bit of the physical address. The mapping function may vary across memory devices or aspects of memory device, and in some cases may vary over time.

Abstract: Methods, systems, and devices for address obfuscation for memory are described. A mapping function may map a logical address of data to a physical address of a memory cell. The mapping function may be implemented with a mapping component that includes mapping subcomponents. Each mapping subcomponent may be independently configurable to implement a logic function for determining a bit of the physical address. The mapping function may vary across memory devices or aspects of memory device, and in some cases may vary over time.