Patents by Inventor Bryce D. Johnson

Bryce D. Johnson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11153205
    Abstract: Aspects and examples are disclosed for apparatuses and processes for establishing a communication link between a network using a routing protocol for low power and lossy networks (RPL) and a non-RPL-enabled device. For instance, a communication link establishment method includes establishing, by a routing protocol for low power and lossy networks (RPL) enabled device, a communication link with a non-RPL-enabled device. The method also includes establishing, by the RPL-enabled device, a network connection with an RPL-enabled network. Further, the method includes providing, by the RPL-enabled device, a proxy communication link between the non-RPL-enabled device and the RPL-enabled network. Providing the proxy communication link includes assigning a globally unique address (GUA) to the non-RPL-enabled device, and transmitting, by the RPL-enabled device, a proxy destination advertisement object to the RPL-enabled network where the proxy destination advertisement object comprises the GUA.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: October 19, 2021
    Assignee: Landis+Gyr Innovations, Inc.
    Inventors: James Patrick Hanley, Chad K. Wolter, Bryce D. Johnson, Lawrence Harris
  • Publication number: 20200314005
    Abstract: Aspects and examples are disclosed for apparatuses and processes for establishing a communication link between a network using a routing protocol for low power and lossy networks (RPL) and a non-RPL-enabled device. For instance, a communication link establishment method includes establishing, by a routing protocol for low power and lossy networks (RPL) enabled device, a communication link with a non-RPL-enabled device. The method also includes establishing, by the RPL-enabled device, a network connection with an RPL-enabled network. Further, the method includes providing, by the RPL-enabled device, a proxy communication link between the non-RPL-enabled device and the RPL-enabled network. Providing the proxy communication link includes assigning a globally unique address (GUA) to the non-RPL-enabled device, and transmitting, by the RPL-enabled device, a proxy destination advertisement object to the RPL-enabled network where the proxy destination advertisement object comprises the GUA.
    Type: Application
    Filed: March 28, 2019
    Publication date: October 1, 2020
    Inventors: James Patrick Hanley, Chad K. Wolter, Bryce D. Johnson, Lawrence Harris
  • Patent number: 9503157
    Abstract: Aspects of the present disclosure are directed toward receiver devices and methods of using receiver devices. One such method can include converting, using an analog-to-digital converter (ADC), and an analog input signal from power distribution lines that carry power using alternating current (AC) to a digital form. This input digital signal can be an oversampled digital signal, where the digital signal is oversampled relative to downstream processing (e.g., FFT-based processing). A processing circuit(s) can then be used to decimate the input digital signal according to a decimation rate. A reference signal can be generated by the processing circuit that is responsive to the decimation rate. The processing circuit can also be used to detect a change in a phase difference between the AC and reference signal and to modify, in response to detecting a change in the phase difference, the decimation rate to counteract the detected change in the phase difference.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: November 22, 2016
    Assignee: Landis+Gyr Technologies, LLC
    Inventors: Stuart L. Haug, Chad Wolter, Bryce D. Johnson
  • Patent number: 9306624
    Abstract: In one or more embodiments, an apparatus includes a first power-line communication circuit to communicate data with a second power-line communication circuit over power lines and using a communication protocol requiring that one of the first power-line communication circuit or the second power-line communication circuit join into regular communications in response to an initiation message received over the power lines. The first power-line communication circuit communicates data regularly with the second power-line communication circuit over the power lines after being joined into regular communications by an initiation message received over the power lines, the initiation message being communicated over the power lines at an initiation time interval, the initiation time interval being based on a random interval that is within an interval range and that is based on a relative time at which at least two of the plurality of endpoint devices are designated to join within an interval range.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: April 5, 2016
    Assignee: Landis+Gyr Technologies, LLC
    Inventors: Chad K. Wolter, Bryce D. Johnson
  • Publication number: 20140314161
    Abstract: Aspects of the present disclosure are directed toward receiver devices and methods of using receiver devices. One such method can include converting, using an analog-to-digital converter (ADC), and an analog input signal from power distribution lines that carry power using alternating current (AC) to a digital form. This input digital signal can be an oversampled digital signal, where the digital signal is oversampled relative to downstream processing (e.g., FFT-based processing). A processing circuit(s) can then be used to decimate the input digital signal according to a decimation rate. A reference signal can be generated by the processing circuit that is responsive to the decimation rate. The processing circuit can also be used to detect a change in a phase difference between the AC and reference signal and to modify, in response to detecting a change in the phase difference, the decimation rate to counteract the detected change in the phase difference.
    Type: Application
    Filed: May 27, 2014
    Publication date: October 23, 2014
    Applicant: Landis+Gyr Technologies, LLC
    Inventors: Stuart L. Haug, Chad Wolter, Bryce D. Johnson
  • Patent number: 8737555
    Abstract: Aspects of the present disclosure are directed toward receiver devices and methods of using receiver devices. One such method can include converting, using an analog-to-digital converter (ADC), and an analog input signal from power distribution lines that carry power using alternating current (AC) to a digital form. This input digital signal can be an oversampled digital signal, where the digital signal is oversampled relative to downstream processing (e.g., FFT-based processing). A processing circuit(s) can then be used to decimate the input digital signal according to a decimation rate. A reference signal can be generated by the processing circuit that is responsive to the decimation rate. The processing circuit can also be used to detect a change in a phase difference between the AC and reference signal and to modify, in response to detecting a change in the phase difference, the decimation rate to counteract the detected change in the phase difference.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: May 27, 2014
    Assignee: Landis+Gyr Technologies, LLC
    Inventors: Stuart L. Haug, Chad Wolter, Bryce D. Johnson
  • Publication number: 20130163644
    Abstract: Aspects of the present disclosure are directed toward receiver devices and methods of using receiver devices. One such method can include converting, using an analog-to-digital converter (ADC), and an analog input signal from power distribution lines that carry power using alternating current (AC) to a digital form. This input digital signal can be an oversampled digital signal, where the digital signal is oversampled relative to downstream processing (e.g., FFT-based processing). A processing circuit(s) can then be used to decimate the input digital signal according to a decimation rate. A reference signal can be generated by the processing circuit that is responsive to the decimation rate. The processing circuit can also be used to detect a change in a phase difference between the AC and reference signal and to modify, in response to detecting a change in the phase difference, the decimation rate to counteract the detected change in the phase difference.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 27, 2013
    Inventors: Stuart L. Haug, Chad Wolter, Bryce D. Johnson