Abstract: A display device includes: a first substrate including an emission area and a non-emission area; a light emitting element on the first substrate in the emission area; a pixel defining layer on the first substrate in the non-emission area; an encapsulation layer on the light emitting element and the pixel defining layer; a first bank on the encapsulation layer in the non-emission area; and a second bank on the encapsulation layer in the non-emission area, and including: a main portion that does not overlap with the first bank; and a protrusion portion overlapping with the first bank, and connected to the main portion.

Abstract: There is provided a display device including a first substrate including a light emission area and a non-light emission area; a first pixel electrode on the light emission area of the first substrate; a pixel defining layer on the non-light emission area of the first substrate, defining a first opening; a thin film encapsulation layer on the first pixel electrode and the pixel defining layer; a first light control layer overlapping the light emission area, on the thin film encapsulation layer; a planarization layer on the thin film encapsulation layer; and a bank pattern overlapping the non-light emission area, on the planarization layer and defining a second opening, wherein the first light control layer includes a first surface directed toward the first pixel electrode, a first side directed toward the bank pattern, and a first inclined surface connecting the first surface with the first side, and the planarization layer is in contact with the first inclined surface.

Abstract: A storage device may read a plurality of data units from a host memory buffer prior to entering a low power mode, release a communication link with the host after reading the plurality of data unit, execute a background operation based on at least one of the plurality of data units, and enter into the low power mode after executing the background operation.

Abstract: A storage device includes a memory device including a plurality of planes each including a plurality of memory blocks, and a controller configured to group the memory blocks into a plurality of super blocks, each including memory blocks belonging to two or more planes operating in parallel, change mapping information so that a bad block included in a super block to be allocated during super block allocation is replaced with a replacement block of the same plane as the bad block, and delete the mapping information corresponding to the replacement block when an allocated super block is released. The memory blocks are divided into user memory blocks grouped into the super blocks and reserved memory blocks that are not grouped into the super blocks, and the replacement block is selected from memory blocks included in free super blocks of an empty status and the reserved memory blocks.

Abstract: A memory system includes a memory device including a plurality of planes each including a plurality of memory blocks; and a memory controller for controlling the memory device to perform an operation on target blocks among the plurality of memory blocks, to store, in a replacement block, data stored in a bad block, on which the operation fails among the target blocks, and control the memory device to temporarily store, in a backup block, data stored in the other blocks except the bad block among the target blocks according to a number of free blocks included in the memory device.