Patents by Inventor Buddhika J. Abesingha

Buddhika J. Abesingha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7388437
    Abstract: An apparatus for generating an output signal having a particular frequency includes an oscillator, a first tuning module, and a second tuning module. The oscillator generates an output signal associated with an output frequency. When coupled to the oscillator, the first tuning module is capable of inducing, within a first amount of time, a change in the output frequency of a particular magnitude. When coupled to the oscillator, the second tuning module is capable of inducing, within a second amount of time, a change in the output frequency of the same magnitude. The second amount of time is greater than the first amount of time. The selector couples a selected one of the first tuning module and the second tuning module to the oscillator based on a difference between a frequency-divided version of the output signal and a reference signal.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: June 17, 2008
    Assignee: Microtune (Texas), L.P.
    Inventors: Buddhika J. Abesingha, Timothy M. Magnusen, Jan-Michael Stevenson, Robert A. Greene
  • Patent number: 6750553
    Abstract: A structure and method of minimizing package-shift effects in integrated circuits is implemented by using a thick metallic overcoat applied after the deposition and patterning of the conventional insulating protective overcoat. The metallic overcoat most preferably comprises a layer of electrolytically deposited copper approximately 15 &mgr;m thick that is patterned to provide for electrically independent regions; but an unbroken area of the metallic overcoat is left over any sensitive analog circuitry, such as a bandgap reference circuit. The thick metallic coating, in addition to minimizing package-shift effects, is also useful as a low-resistance routing layer. The metallic overcoat is sufficiently thin to allow low-profile packaging. The method employs a conductive overcoat that is significantly thin compared to conventional insulating conformal overcoats.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: June 15, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Buddhika J. Abesingha, Gabriel A. Rincon-Mora, David D. Briggs, Roy Alan Hastings
  • Publication number: 20020182780
    Abstract: A structure and method of minimizing package-shift effects in integrated circuits is implemented by using a thick metallic overcoat applied after the deposition and patterning of the conventional insulating protective overcoat. The metallic overcoat most preferably comprises a layer of electrolytically deposited copper approximately 15 &mgr;m thick that is patterned to provide for electrically independent regions; but an unbroken area of the metallic overcoat is left over any sensitive analog circuitry, such as a bandgap reference circuit. The thick metallic coating, in addition to minimizing package-shift effects, is also useful as a low-resistance routing layer. The metallic overcoat is sufficiently thin to allow low-profile packaging. The method employs a conductive overcoat that is significantly thin compared to conventional insulating conformal overcoats.
    Type: Application
    Filed: August 9, 2001
    Publication date: December 5, 2002
    Inventors: Buddhika J. Abesingha, Gabriel A. Rincon-Mora, David D. Briggs, Roy Alan Hastings
  • Patent number: 6432753
    Abstract: A structure and method of minimizing package-shift effects in integrated circuits is implemented by using a thick metallic overcoat applied after the deposition and patterning of the conventional insulating protective overcoat. The metallic overcoat most preferably comprises a layer of electrolytically deposited copper approximately 15 &mgr;m thick that is patterned to provide for electrically independent regions; but an unbroken area of the metallic overcoat is left over any sensitive analog circuitry, such as a bandgap reference circuit. The thick metallic coating, in addition to minimizing package-shift effects, is also useful as a low-resistance routing layer. The metallic overcoat is sufficiently thin to allow low-profile packaging. The method employs a conductive overcoat that is significantly thin compared to conventional insulating conformal overcoats.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: August 13, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Buddhika J. Abesingha, Gabriel A. Rincon-Mora, David D. Briggs, Roy Alan Hastings