Abstract: An apparatus for forming a stamped groove in a lead frame including a tool for coining the groove in the lead frame. The tool has a shoulder to control swelling of the lead frame surface near the groove.

Abstract: A modular tool for forming features in an exposed pad having a pad surface between a bleed groove and an edge of the pad surface in a lead frame including a first tool for forming a bottom of the exposed pad under the pad surface, a second tool coupled to the first tool for forming a side of the exposed pad, and a third tool coupled to the first tool for forming another side of the exposed pad.

Abstract: A semiconductor device comprising a thermally conductive foil including a chip mount portion having first and second surfaces; an integrated circuit chip attached to said first surface; a body of encapsulation material molded around said chip and said first surface such that it leaves said second surface exposed; and said second surface comprising means for forming thermal contact, thereby creating a path for dissipating thermal energy from said chip. Said means for thermal contact comprise a configuration of said second surface suitable for direct thermal attachment to a heat sink. Alternatively, said means for thermal contact comprise a configuration of said second surface suitable for thermal attachment including solder balls between the chip and the heat sink.

Abstract: A semiconductor device, especially a Ball Grid Array or Chip Scale Package, comprising an integrated circuit chip having at least one input/output terminal; a body of encapsulation material molded around said chip, forming a generally flat surface including at least one dimple having a suitable size and shape to receive a solder ball or solder paste; and said dimple having an electrically conductive solderable surface connected to said terminal.

Abstract: The invention provides a low inductance semiconductor package for RF circuits having a flat leadframe with internal leads formed upward to be in very close proximity to the die mount pad. The die mount pad is exposed through the package backside and serves both as a ground plane and as a heat spreader. The external leads are flat and extend beyond the package edge so that good solder connections to a printed wiring board can be made and inspected. The lead tips exposed beyond the package further provide a position for mold clamping and for test probing the device.

Abstract: The invention relates to a single piece leadframe that can be used in current semiconductor device production. The leadframe has a plurality of segments in a horizontal plane, a chip mount pad in a different horizontal plane, and another plurality of segments connecting said chip mount pad with said leadframe. The latter plurality of segments has a geometry designed so as to tolerate bending and stretching beyond the limit of simple elongation based upon the inherent material characteristics. The chip mount pad of said leadframe provides direct thermal contact to an external heat conductor or heat sink by being designed so as to extend through the encapsulating package. The exposed chip pad can also be used electrically as a ground connection.

Abstract: The invention is a single piece deep downset exposed lead frame (10) that can be used in current production processes. A single lead frame (10) has a die mount pad (12) that is formed with a downset or cavity into which the semiconductor die (20) is mounted. Wings (14, 15, 17, 18) lock the die pad in the device package (21) and increase the length of potential moisture paths (34a). The downset die pad (12) provides direct thermal contact of the die mount pad (12) to an external heat sink, eliminating the need for a heat slug internal to the package. The exposed die pad (12) can also be used as an RF ground connection to an RF circuit ground plane.

Abstract: This is a package [10] for an rf device [11] operable with a characteristic impedance providing a plurality of terminals [12-19] and [101] for effecting circuit connections to the device, the connection between at least one of the terminals and the device being matched in relation to the characteristic impedance. Other devices and methods are also disclosed.