Patents by Inventor Bulent Basaran

Bulent Basaran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Full-custom voltage-dependent design rules (VDRC) flow
    Patent number: 10796062
    Abstract: The independent claims of this patent signify a concise description of embodiments. Embodiments described herein are directed to a database-driven scheme for automating the process of VDRC checking in a full-custom EDA Design and Implementation tool.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: October 6, 2020
    Assignee: SYNOPSYS, INC.
    Inventors: Nabil Yazdani, Donald Oriordan, Jingyu Xu, Bulent Basaran, Larissa Nitchougovskaia
  • Placement of circuit elements in regions with customized placement grids
    Patent number: 10275560
    Abstract: Embodiments relate to using placement grids corresponding to repeating track patterns of metal layers in a region to place circuit elements. Each placement grid is defined by as a vertical pitch of a repeating track pattern of one metal layer and a horizontal pitch of another repeating track pattern of another metal layer. Each circuit element is assigned with a placement grid so that it can be placed in alignment with the assigned placement grid. By using the placement grids derived from the track patterns, routable placement of circuit elements can be performed automatically or manually with reduced efforts.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: April 30, 2019
    Assignee: Synopsys, Inc.
    Inventors: Bulent Basaran, Jon Francis Bendicksen, Friedrich Gunter Kurt Sendig
  • FULL-CUSTOM VOLTAGE-DEPENDENT DESIGN RULES (VDRC) FLOW
    Publication number: 20180341742
    Abstract: The independent claims of this patent signify a concise description of embodiments. Embodiments described herein are directed to a database-driven scheme for automating the process of VDRC checking in a full-custom EDA Design and Implementation tool.
    Type: Application
    Filed: May 25, 2018
    Publication date: November 29, 2018
    Inventors: Nabil Yazdani, Donald Oriordan, Jingyu Xu, Bulent Basaran, Larissa Nitchougovskaia
  • PLACEMENT OF CIRCUIT ELEMENTS IN REGIONS WITH CUSTOMIZED PLACEMENT GRIDS
    Publication number: 20170344689
    Abstract: Embodiments relate to using placement grids corresponding to repeating track patterns of metal layers in a region to place circuit elements. Each placement grid is defined by as a vertical pitch of a repeating track pattern of one metal layer and a horizontal pitch of another repeating track pattern of another metal layer. Each circuit element is assigned with a placement grid so that it can be placed in alignment with the assigned placement grid. By using the placement grids derived from the track patterns, routable placement of circuit elements can be performed automatically or manually with reduced efforts.
    Type: Application
    Filed: May 11, 2017
    Publication date: November 30, 2017
    Inventors: Bulent Basaran, Jon Francis Bendicksen, Friedrich Gunter Kurt Sendig