Abstract: A secondary battery having an electrode assembly in which electrodes and separators are alternatively stacked; a pouch in which the electrode assembly is accommodated; a plurality of electrode leads connected to side portions of the electrode assembly to and extending outside of the pouch; and a support configured to connect the plurality of electrode leads.

Abstract: The present disclosure relates to a secondary battery module that is capable of being disposed inside a secondary battery pack in various forms and being easily set in series or parallel between cells inside the secondary battery pack, thereby improving efficiency in designing the secondary battery pack. A secondary battery module according to the present disclosure includes: a plurality of cells comprising a first cell and a second cell which are facing each other, and a rotation member disposed between a surface of the first cell and a surface of the second cell facing the surface of the first cell, wherein the first cell is rotatable with respect to the second cell.

Abstract: The present disclosure relates to a secondary battery module that is capable of being disposed inside a secondary battery pack in various forms and being easily set in series or parallel between cells inside the secondary battery pack, thereby improving efficiency in designing the secondary battery pack. A secondary battery module according to the present disclosure includes: a plurality of cells comprising a first cell and a second cell which are facing each other, and a rotation member disposed between a surface of the first cell and a surface of the second cell facing the surface of the first cell, wherein the first cell is rotatable with respect to the second cell.

Abstract: Disclosed is an apparatus and method for balancing battery packs connected in parallel. If the pack voltage deviation of the first to nth battery packs is greater than the first threshold value, a battery cell having a higher voltage than the pack balancing target voltage set according to a preset criterion among the voltages of all cells is discharged to perform pack balancing for each battery pack and if the pack voltage deviation is equal to or smaller than the first threshold value, a battery cell having a higher voltage than the cell balancing target voltage set according to a preset criterion among the voltages of the cells included in a battery pack having a cell voltage deviation greater than the second threshold value is discharged to perform cell balancing for each battery pack.

Abstract: Disclosed is an apparatus and method for controlling a turn-on sequence of switches included in a parallel multi battery pack, including a processor that receives a switch voltage value from a voltage sensor coupled to a kth sequence switch unit (k is a turn-on sequence index, which is a natural number of 2 to n) before turning on the kth sequence switch, then turns on the kth sequence switch, subsequently receives a switch current value from a current sensor connected to the kth sequence switch, counts a watt energy value consumed in the kth sequence switch from the switch voltage value and the switch current value and determines the turn-on sequence of the first to nth switches in descending order from a switch having a greatest watt energy count value.

Abstract: A battery resistance diagnosis device includes a current supply unit configured to supply a preset fixed current to a battery cell, a voltage measurement unit configured to measure an open circuit voltage of the battery cell while the fixed current is supplied, an external resistance calculation unit configured to calculate an external resistance value of the battery based on the fixed current and the open circuit voltage of the battery cell, and an abnormality diagnosis unit configured to diagnose a battery abnormality due to a voltage drop by comparing the calculated external resistance value with a preset external resistance value.

Abstract: An apparatus and method for diagnosing a failure of a switch unit included in a multi battery pack. The magnitude of a pack current flowing from each of battery packs connected in parallel to a load is measured, a battery pack whose pack current has a magnitude smaller than the average value by a threshold value or more is identified, and it is determined that an open failure occurs at the switch unit included in the identified battery pack, and the information of the battery pack including the switch unit at which the open failure occurs is output. The internal resistance of each battery pack may be statistically analyzed in order to more accurately diagnose the failure at the switch unit. Thus, an open failure of switch units included in battery packs connected in parallel may be easily and reliably diagnosed in a statistical viewpoint.

Abstract: The present invention relates to a pouch-shaped secondary battery with improved safety including a gas pocket disposed on an electrode lead and a current sensing portion configured to move in response to expansion of the gas pocket. The pouch-shaped secondary battery may be capable of indicating the extent of gas in a receiving portion of the case in advance. A battery module may include the pouch-shaped secondary battery.

Abstract: A storage device includes a main storage and a storage controller to control the main storage. The main storage stores data and includes a plurality of nonvolatile memory devices. The storage controller loads at least one of (a) at least a portion of mapping tables and (b) at least one of a portion of directories to a host memory buffer included in an external host device, based on at least one of a size of the host memory buffer and locality information associated with a data access pattern of the host device. The mapping tables are stored in the nonvolatile memory devices and the mapping tables indicate a mapping relationship between a physical address and a logical address of corresponding ones of the nonvolatile memory devices. The directories store address information of the mapping tables.

Abstract: An apparatus and method for diagnosing a battery bank having a failure in a connection state, including a state measuring unit configured to measure a state of each battery bank of a battery pack during a charging process and a discharging process of the battery pack; and a control unit configured to extract at least one battery bank by comparing states of the battery banks measured during the charging process of the battery pack with each other, extract at least one battery bank by comparing states of the battery banks measured during the discharging process of the battery pack with each other, and distinguish a battery bank having a failure in a connection state based on whether the battery banks respectively extracted during the charging process and the discharging process are identical to each other.

Abstract: An apparatus and method for diagnosing a failure of a switch unit included in a multi battery pack. The magnitude of a pack current flowing from each of battery packs connected in parallel to a load is measured, a battery pack whose pack current has a magnitude smaller than the average value by a threshold value or more is identified, and it is determined that an open failure occurs at the switch unit included in the identified battery pack, and the information of the battery pack including the switch unit at which the open failure occurs is output. The internal resistance of each battery pack may be statistically analyzed in order to more accurately diagnose the failure at the switch unit. Thus, an open failure of switch units included in battery packs connected in parallel may be easily and reliably diagnosed in a statistical viewpoint.

Abstract: A battery resistance diagnosis device includes a current supply unit configured to supply a preset fixed current to a battery cell, a voltage measurement unit configured to measure an open circuit voltage of the battery cell while the fixed current is supplied, an external resistance calculation unit configured to calculate an external resistance value of the battery based on the fixed current and the open circuit voltage of the battery cell, and an abnormality diagnosis unit configured to diagnose a battery abnormality due to a voltage drop by comparing the calculated external resistance value with a preset external resistance value.

Abstract: Disclosed is an apparatus and method for controlling a turn-on sequence of switches included in a parallel multi battery pack, including a processor that receives a switch voltage value from a voltage sensor coupled to a kth sequence switch unit (k is a turn-on sequence index, which is a natural number of 2 to n) before turning on the kth sequence switch, then turns on the kth sequence switch, subsequently receives a switch current value from a current sensor connected to the kth sequence switch, counts a watt energy value consumed in the kth sequence switch from the switch voltage value and the switch current value and determines the turn-on sequence of the first to nth switches in descending order from a switch having a greatest watt energy count value.

Abstract: Disclosed is an apparatus and method for balancing battery packs connected in parallel. If the pack voltage deviation of the first to nth battery packs is greater than the first threshold value, a battery cell having a higher voltage than the pack balancing target voltage set according to a preset criterion among the voltages of all cells is discharged to perform pack balancing for each battery pack and if the pack voltage deviation is equal to or smaller than the first threshold value, a battery cell having a higher voltage than the cell balancing target voltage set according to a preset criterion among the voltages of the cells included in a battery pack having a cell voltage deviation greater than the second threshold value is discharged to perform cell balancing for each battery pack.

Abstract: A storage device includes a main storage and a storage controller to control the main storage. The main storage stores data and includes a plurality of nonvolatile memory devices. The storage controller loads at least one of (a) at least a portion of mapping tables and (b) at least one of a portion of directories to a host memory buffer included in an external host device, based on at least one of a size of the host memory buffer and locality information associated with a data access pattern of the host device. The mapping tables are stored in the nonvolatile memory devices and the mapping tables indicate a mapping relationship between a physical address and a logical address of corresponding ones of the nonvolatile memory devices. The directories store address information of the mapping tables.

Abstract: A storage device includes a main storage and a storage controller to control the main storage. The main storage stores data and includes a plurality of nonvolatile memory devices. The storage controller loads at least one of (a) at least a portion of mapping tables and (b) at least one of a portion of directories to a host memory buffer included in an external host device, based on at least one of a size of the host memory buffer and locality information associated with a data access pattern of the host device. The mapping tables are stored in the nonvolatile memory devices and the mapping tables indicate a mapping relationship between a physical address and a logical address of corresponding ones of the nonvolatile memory devices. The directories store address information of the mapping tables.

Abstract: A storage device includes a main storage and a storage controller to control the main storage. The main storage stores data and includes a plurality of nonvolatile memory devices. The storage controller loads at least one of (a) at least a portion of mapping tables and (b) at least one of a portion of directories to a host memory buffer included in an external host device, based on at least one of a size of the host memory buffer and locality information associated with a data access pattern of the host device. The mapping tables are stored in the nonvolatile memory devices and the mapping tables indicate a mapping relationship between a physical address and a logical address of corresponding ones of the nonvolatile memory devices. The directories store address information of the mapping tables.

Abstract: A memory device and a dynamic garbage collection method thereof are provided. The method includes receiving a minimum operating speed, ascertaining a reference valid page count ratio (VPC), using a maximum operating speed, the minimum operating speed, and a garbage collection speed, the reference VPC ratio being ascertained by the following formula 1 and determining whether to perform a garbage collection, using the reference VPC ratio and a current average VPC ratio. <Formula 1> Vr=Gp (Jp?Mp)/(Jp*Mp+(Gp*(Jp?Mp))) Here, Vr is the reference VPC ratio, Gp is the garbage collection speed, Jp is the maximum operating speed, and Mp is the minimum operating speed.

Abstract: An operating method performed by a storage device includes selecting a first task from among a plurality of tasks queuing in a command queue of the storage device, checking a first block to be accessed by the first task using a mapping table loaded to the storage device, determining whether the first block is a read reclaim target or a replacement target, and determining an order of executing the first task depending on whether the first block is the read reclaim target or the replacement target.

Abstract: A memory device and a dynamic garbage collection method thereof are provided. The method includes receiving a minimum operating speed, ascertaining a reference valid page count ratio (VPC), using a maximum operating speed, the minimum operating speed, and a garbage collection speed, the reference VPC ratio being ascertained by the following formula 1 and determining whether to perform a garbage collection, using the reference VPC ratio and a current average VPC ratio. <Formula 1> Vr=Gp (Jp?Mp)/(Jp*Mp+(Gp*(Jp?Mp))) Here, Vr is the reference VPC ratio, Gp is the garbage collection speed, Jp is the maximum operating speed, and Mp is the minimum operating speed.