Patents by Inventor BumJoon Hong

BumJoon Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9236319
    Abstract: A stacked integrated circuit package system includes: providing a base integrated circuit package, and mounting a top integrated circuit package having a top interposer and a top encapsulation with a cavity therein or the cavity as a space between top intra-stack interconnects and the top interposer, with the top interposer exposed by the cavity, over the base integrated circuit package.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: January 12, 2016
    Assignee: STATS ChipPAC Ltd.
    Inventors: Jong-Woo Ha, Flynn Carson, BumJoon Hong, SeongMin Lee
  • Patent number: 8642383
    Abstract: An integrated circuit package system that includes: providing an electrical interconnect system including a first lead-finger system and a second lead-finger system; connecting a first device to the first lead-finger system with a wire bond; stacking a second device over the first device; and connecting the second device to the second lead-finger system with a bump bond.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: February 4, 2014
    Assignee: Stats Chippac Ltd.
    Inventors: Jong-Woo Ha, BumJoon Hong
  • Patent number: 8383458
    Abstract: A method for manufacturing an integrated circuit package system includes: providing a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect formed on one side; and mounting an offset package over the base package, the offset package electrically coupled to the base substrate via a system interconnect.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: February 26, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: DaeSik Choi, BumJoon Hong, Sang-Ho Lee, Jong-Woo Ha, Soo-San Park
  • Patent number: 8093727
    Abstract: A method for manufacturing of an integrated circuit package-in-package system includes: mounting a first integrated circuit device over a substrate; mounting an integrated circuit package system having an inner encapsulation over the first integrated circuit device with a first offset; mounting a second integrated circuit device over the first integrated circuit device and adjacent to the integrated circuit package system; connecting the integrated circuit package system and the substrate; and forming a package encapsulation as a cover for the first integrated circuit device, the integrated circuit package system, and the second integrated circuit device.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: January 10, 2012
    Assignee: STATS Chippac Ltd.
    Inventors: Soo-San Park, BumJoon Hong, Sang-Ho Lee, Jong-Woo Ha
  • Patent number: 8067268
    Abstract: A method for manufacturing of a stacked integrated circuit package system includes: providing a base integrated circuit package having a base encapsulation with a cavity therein and a base interposer exposed by the cavity; mounting an intermediate integrated circuit package over the base interposer; and mounting a top integrated circuit package over the intermediate integrated circuit package.
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: November 29, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Flynn Carson, Jong-Woo Ha, BumJoon Hong, SeongMin Lee
  • Publication number: 20110084373
    Abstract: A method for manufacturing an integrated circuit package system includes: providing a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect formed on one side; and mounting an offset package over the base package, the offset package electrically coupled to the base substrate via a system interconnect.
    Type: Application
    Filed: December 21, 2010
    Publication date: April 14, 2011
    Inventors: DaeSik Choi, BumJoon Hong, Sang-Ho Lee, Jong-Woo Ha, Soo-San Park
  • Patent number: 7872340
    Abstract: A method for manufacturing an integrated circuit package system includes: providing a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect formed on one side; and mounting an offset package over the base package, the offset package electrically coupled to the base substrate via a system interconnect.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: January 18, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: DaeSik Choi, BumJoon Hong, Sang-Ho Lee, Jong-Woo Ha, Soo-San Park
  • Publication number: 20100320621
    Abstract: A method for manufacturing of an integrated circuit package-in-package system includes: mounting a first integrated circuit device over a substrate; mounting an integrated circuit package system having an inner encapsulation over the first integrated circuit device with a first offset; mounting a second integrated circuit device over the first integrated circuit device and adjacent to the integrated circuit package system; connecting the integrated circuit package system and the substrate; and forming a package encapsulation as a cover for the first integrated circuit device, the integrated circuit package system, and the second integrated circuit device.
    Type: Application
    Filed: August 30, 2010
    Publication date: December 23, 2010
    Inventors: Soo-San Park, BumJoon Hong, Sang-Ho Lee, Jong-Woo Ha
  • Patent number: 7812435
    Abstract: An integrated circuit package-in-package system includes: mounting a first integrated circuit device over a substrate; mounting an integrated circuit package system having an inner encapsulation over the first integrated circuit device with a first offset; mounting a second integrated circuit device over the first integrated circuit device and adjacent to the integrated circuit package system; connecting the integrated circuit package system and the substrate; and forming a package encapsulation as a cover for the first integrated circuit device, the integrated circuit package system, and the second integrated circuit device.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: October 12, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: Soo-San Park, BumJoon Hong, Sang-Ho Lee, Jong-Woo Ha
  • Publication number: 20100224979
    Abstract: A method for manufacturing of a stacked integrated circuit package system includes: providing a base integrated circuit package having a base encapsulation with a cavity therein and a base interposer exposed by the cavity; mounting an intermediate integrated circuit package over the base interposer; and mounting a top integrated circuit package over the intermediate integrated circuit package.
    Type: Application
    Filed: May 19, 2010
    Publication date: September 9, 2010
    Inventors: Flynn Carson, Jong-Woo Ha, BumJoon Hong, SeongMin Lee
  • Patent number: 7750454
    Abstract: A stacked integrated circuit package system includes: providing a base integrated circuit package having a base encapsulation with a cavity therein and a base interposer exposed by the cavity; mounting an intermediate integrated circuit package over the base interposer, and mounting a top integrated circuit package over the intermediate integrated circuit package.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: July 6, 2010
    Assignee: STATS ChipPAC Ltd.
    Inventors: Flynn Carson, Jong-Woo Ha, BumJoon Hong, SeongMin Lee
  • Patent number: 7741154
    Abstract: An integrated circuit package system comprising: providing a module lead array; attaching a module integrated circuit adjacent the module lead array; attaching a module substrate over the module integrated circuit; and applying a module encapsulant over the module integrated circuit wherein the module lead array and the module substrate are partially exposed.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: June 22, 2010
    Assignee: STATS Chippac Ltd.
    Inventors: Jong-Woo Ha, Flynn Carson, BumJoon Hong, SeongMin Lee
  • Patent number: 7659609
    Abstract: An integrated circuit package-in-package system includes: mounting an integrated circuit device over a package carrier; forming a subassembly including: providing an integrated circuit package system having a carrier interposer with an integrated circuit die thereover, and mounting a device under the carrier interposer; mounting the subassembly over the integrated circuit device; and encapsulating the subassembly and the integrated circuit device over the package carrier.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: February 9, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: Jong-Woo Ha, BumJoon Hong, Sang-Ho Lee, Soo-San Park
  • Publication number: 20090243071
    Abstract: An integrated circuit package system comprising: providing a module lead array; attaching a module integrated circuit adjacent the module lead array; attaching a module substrate over the module integrated circuit; and applying a module encapsulant over the module integrated circuit wherein the module lead array and the module substrate are partially exposed.
    Type: Application
    Filed: March 26, 2008
    Publication date: October 1, 2009
    Inventors: Jong-Woo Ha, Flynn Carson, BumJoon Hong, SeongMin Lee
  • Publication number: 20090243073
    Abstract: A stacked integrated circuit package system includes: providing a base integrated circuit package having a base encapsulation with a cavity therein and a base interposer exposed by the cavity; mounting an intermediate integrated circuit package over the base interposer, and mounting a top integrated circuit package over the intermediate integrated circuit package.
    Type: Application
    Filed: March 27, 2008
    Publication date: October 1, 2009
    Inventors: Flynn Carson, Jong-Woo Ha, BumJoon Hong, SeongMin Lee
  • Publication number: 20090243072
    Abstract: A stacked integrated circuit package system includes: providing a base integrated circuit package, and mounting a top integrated circuit package having a top interposer and a top encapsulation with a cavity therein or the cavity as a space between top intra-stack interconnects and the top interposer, with the top interposer exposed by the cavity, over the base integrated circuit package.
    Type: Application
    Filed: March 27, 2008
    Publication date: October 1, 2009
    Inventors: Jong-Woo Ha, Flynn Carson, BumJoon Hong, SeongMin Lee
  • Publication number: 20090152740
    Abstract: An integrated circuit package system includes: mounting a flip chip over a carrier with a non-active side of the flip chip facing the carrier; mounting a substrate over the flip chip; connecting an internal interconnect between the flip chip and the carrier; and encapsulating the flip chip and the internal interconnect over the carrier with the substrate exposed.
    Type: Application
    Filed: December 17, 2007
    Publication date: June 18, 2009
    Inventors: Soo-San Park, BumJoon Hong, Sang-Ho Lee, Jong-Woo Ha, DaeSik Choi
  • Publication number: 20090057862
    Abstract: An integrated circuit package-in-package system includes: mounting an integrated circuit device over a package carrier; forming a subassembly including: providing an integrated circuit package system having a carrier interposer with an integrated circuit die thereover, and mounting a device under the carrier interposer; mounting the subassembly over the integrated circuit device; and encapsulating the subassembly and the integrated circuit device over the package carrier.
    Type: Application
    Filed: August 31, 2007
    Publication date: March 5, 2009
    Inventors: Jong-Woo Ha, BumJoon Hong, Sang-Ho Lee, Soo-San Park
  • Publication number: 20090057861
    Abstract: An integrated circuit package-in-package system includes: mounting a first integrated circuit device over a substrate; mounting an integrated circuit package system having an inner encapsulation over the first integrated circuit device with a first offset; mounting a second integrated circuit device over the first integrated circuit device and adjacent to the integrated circuit package system; connecting the integrated circuit package system and the substrate; and forming a package encapsulation as a cover for the first integrated circuit device, the integrated circuit package system, and the second integrated circuit device.
    Type: Application
    Filed: August 31, 2007
    Publication date: March 5, 2009
    Inventors: Soo-San Park, BumJoon Hong, Sang-Ho Lee, Jong-Woo Ha
  • Publication number: 20090057864
    Abstract: A method for manufacturing an integrated circuit package system includes: providing a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect formed on one side; and mounting an offset package over the base package, the offset package electrically coupled to the base substrate via a system interconnect.
    Type: Application
    Filed: August 29, 2008
    Publication date: March 5, 2009
    Inventors: DaeSik Choi, BumJoon Hong, Sang-Ho Lee, Jong-Woo Ha, Soo-San Park