Abstract: An integrated circuit device includes a nonvolatile memory, first and second buffer memories, and a controller. Each of the first and second buffer memories is configured to buffer write data to be written to the nonvolatile memory in response to a write request and also buffer read data received from the nonvolatile memory in response to a read request. A controller is provided, which evaluates the first buffer memory against at least one criterion relating to data accuracy. The controller is configured to: redirect at least some of the write data from the first buffer memory to the second buffer memory in response to the write request when the evaluation demonstrates the criterion has been exceeded, and redirect at least some of the read data from the first buffer memory to the second buffer memory in response to the read request when the evaluation demonstrates the criterion has been exceeded.

Abstract: An integrated circuit device includes a nonvolatile memory, first and second buffer memories, and a controller. Each of the first and second buffer memories is configured to buffer write data to be written to the nonvolatile memory in response to a write request and also buffer read data received from the nonvolatile memory in response to a read request. A controller is provided, which evaluates the first buffer memory against at least one criterion relating to data accuracy. The controller is configured to: redirect at least some of the write data from the first buffer memory to the second buffer memory in response to the write request when the evaluation demonstrates the criterion has been exceeded, and redirect at least some of the read data from the first buffer memory to the second buffer memory in response to the read request when the evaluation demonstrates the criterion has been exceeded.

Abstract: An integrated circuit device includes a nonvolatile memory, first and second buffer memories, and a controller. Each of the first and second buffer memories is configured to buffer write data to be written to the nonvolatile memory in response to a write request and also buffer read data received from the nonvolatile memory in response to a read request. A controller is provided, which evaluates the first buffer memory against at least one criterion relating to data accuracy. The controller is configured to: redirect at least some of the write data from the first buffer memory to the second buffer memory in response to the write request when the evaluation demonstrates the criterion has been exceeded, and redirect at least some of the read data from the first buffer memory to the second buffer memory in response to the read request when the evaluation demonstrates the criterion has been exceeded.

Abstract: An integrated circuit device includes a nonvolatile memory, first and second buffer memories, and a controller. Each of the first and second buffer memories is configured to buffer write data to be written to the nonvolatile memory in response to a write request and also buffer read data received from the nonvolatile memory in response to a read request. A controller is provided, which evaluates the first buffer memory against at least one criterion relating to data accuracy. The controller is configured to: redirect at least some of the write data from the first buffer memory to the second buffer memory in response to the write request when the evaluation demonstrates the criterion has been exceeded, and redirect at least some of the read data from the first buffer memory to the second buffer memory in response to the read request when the evaluation demonstrates the criterion has been exceeded.

Abstract: A flexible server system includes an embedded processor, one or more processor boards, one or more storage boards, and a switch including a plurality of ports. The embedded processor, the one or more processor boards, and the one or more storage boards are connected to a corresponding one of the plurality of ports. The embedded processor, the one or more processor boards, the one or more storage boards, and the switch each include a peripheral component interconnect express (PCIe) interface. The one or more processor boards and the one or more storage boards are connected to the switch through connectors where each of the corresponding connectors have a same size. The embedded processor controls the switch to route a packet from one of the plurality of ports to another one of the plurality of ports.

Abstract: A structure of a shift lever that changes to a manual mode. The structure includes a shift lever that has a protrusion formed to a horizontal side and a base spaced from the shift lever to allow the protrusion to reach the base during horizontal movement of the shift lever. A G-return to which the protrusion is coupled is mounted on the base to be able to turn and a knob that is connected to one end of a knob lever pivotably mounted on the base with the other end of the knob lever facing the shift lever, slides with the horizontal movement of the shift lever. The conversion to a manual mode is sensed from the sliding of the knob and change to the manual mode is controlled by turning of the G-return.

Abstract: A flexible server system includes an embedded processor, one or more processor boards, one or more storage boards, and a switch including a plurality of ports. The embedded processor, the one or more processor boards, and the one or more storage boards are connected to a corresponding one of the plurality of ports. The embedded processor, the one or more processor boards, the one or more storage boards, and the switch each include a peripheral component interconnect express (PCIe) interface. The one or more processor boards and the one or more storage boards are connected to the switch through connectors where each of the corresponding connectors have a same size. The embedded processor controls the switch to route a packet from one of the plurality of ports to another one of the plurality of ports.

Abstract: A structure of a shift lever that changes to a manual mode. The structure includes a shift lever that has a protrusion formed to a horizontal side and a base spaced from the shift lever to allow the protrusion to reach the base during horizontal movement of the shift lever. A G-return to which the protrusion is coupled is mounted on the base to be able to turn and a knob that is connected to one end of a knob lever pivotably mounted on the base with the other end of the knob lever facing the shift lever, slides with the horizontal movement of the shift lever. The conversion to a manual mode is sensed from the sliding of the knob and change to the manual mode is controlled by turning of the G-return.

Abstract: An engage lever that connects a shift lever and a gear shift cable of a gearbox of a vehicle. The engage lever is directly connected on a body of a bearing block disposed at a lower portion of the engage lever.