Abstract: An imaging device includes a light source operated by an optical control signal generated using a first reference signal having a first frequency and a second reference signal, having a second frequency different from the first frequency, a plurality of pixels, each of the plurality of pixels including a pixel circuit outputting a pixel signal corresponding to the electrical charge of a photodiode, and a logic circuit configured to generate raw data to generate a depth image, using the pixel signal. The plurality of pixels include first pixels and second pixels, and the logic circuit inputs a first photo control signal, having the first frequency, to the pixel circuit connected to a photodiode in each of the first pixels, and inputs a second photo control signal, having the second frequency, to the pixel circuit connected to a photodiode in each of the second pixels.

Abstract: An imaging device includes a light source operated by an optical control signal generated using a first reference signal having a first frequency and a second reference signal, having a second frequency different from the first frequency, a plurality of pixels, each of the plurality of pixels including a pixel circuit outputting a pixel signal corresponding to the electrical charge of a photodiode, and a logic circuit configured to generate raw data to generate a depth image, using the pixel signal. The plurality of pixels include first pixels and second pixels, and the logic circuit inputs a first photo control signal, having the first frequency, to the pixel circuit connected to a photodiode in each of the first pixels, and inputs a second photo control signal, having the second frequency, to the pixel circuit connected to a photodiode in each of the second pixels.

Abstract: An image sensor includes a plurality of pixels and a phase select circuit. Each pixel outputs a pixel signal corresponding to a photoelectric signal in response to a photo gate signal. The phase select circuit outputs delay clock signals of different phases from each other to an object pixel in response to different integration times from each other in a frame. The phase select circuit includes a plurality of delay circuit cells corresponding to at least some pixels of the plurality of pixels. Each of the plurality of delay circuit cells generates a delay clock signal of a certain phase difference from any one of a reference clock signal and an output signal of another delay circuit cell according to a logic state of a select signal.