Patents by Inventor Bun-Hin Keong

Bun-Hin Keong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Chip-sized flip-chip semiconductor package and method for making the same
    Patent number: 7615410
    Abstract: A semiconductor package (10; 14) comprises a semiconductor die (2; 2?) with a plurality of contact areas (4) on its active surface and an electrically conductive bump (7) on each contact area (4). The die (2; 2?) and electrically conductive bumps (7) are encapsulated in a plastic housing (11) so that the plastic housing (11) encapsulates at least sides of the die (2; 2?) and sides of the electrically conductive bumps (7).
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: November 10, 2009
    Assignee: Infineon Technologies AG
    Inventors: Koh Hoo Goh, Bun-Hin Keong, Abdul Rahman Mohamed
  • Leadframe for use in a semiconductor package
    Patent number: 7432584
    Abstract: A leadframe comprises a die mounting area, a plurality of lead fingers and a metal deposit having a negative electrochemical potential with respect to a standard H2 half cell. A semiconductor package comprises the leadframe and a semiconductor chip having a plurality of contact areas mounted to the die mounting area and electrically connected to the inner ends of the lead fingers of the leadframe by a plurality of bond wires. The semiconductor chip, the bond wires and inner portions of the lead fingers are encapsulated by a plastic housing.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: October 7, 2008
    Assignee: Infineon Technologies, AG
    Inventors: Koh Hoo Goh, Bun-Hin Keong
  • Chip-Sized Flip-Chip Semiconductor Package and Method for Making the Same
    Publication number: 20070029666
    Abstract: A semiconductor package (10; 14) comprises a semiconductor die (2; 2?) with a plurality of contact areas (4) on its active surface and an electrically conductive bump (7) on each contact area (4). The die (2; 2?) and electrically conductive bumps (7) are encapsulated in a plastic housing (11) so that the plastic housing (11) encapsulates at least sides of the die (2; 2?) and sides of the electrically conductive bumps (7).
    Type: Application
    Filed: July 12, 2006
    Publication date: February 8, 2007
    Inventors: Koh Hoo Goh, Bun-Hin Keong, Abdul Mohamed
  • Leadframe for use in a semiconductor package
    Publication number: 20050077598
    Abstract: A leadframe comprises a die mounting area, a plurality of lead fingers and a metal deposit having a negative electrochemical potential with respect to a standard H2 half cell. A semiconductor package comprises the leadframe and a semiconductor chip having a plurality of contact areas mounted to the die mounting area and electrically connected to the inner ends of the lead fingers of the leadframe by a plurality of bond wires. The semiconductor chip, the bond wires and inner portions of the lead fingers are encapsulated by a plastic housing.
    Type: Application
    Filed: October 13, 2004
    Publication date: April 14, 2005
    Inventors: Koh Goh, Bun-Hin Keong