Abstract: A method of manufacturing an integrated circuit device includes selectively etching only a silicon oxide film from among the silicon oxide film and a nitride film on a substrate in a plasma atmosphere by using an etching gas including at least one compound from among hydrofluorocarbons and perfluorocarbons. The etching includes repeating, at least once, one cycle including first to third sub-operations having respective, different combinations of supply gases applied onto the substrate. The first sub-operation using a first plasma atmosphere obtained from the etching gas and an inert gas, the second sub-operation using a second plasma atmosphere obtained from the inert gas while the etching gas is blocked from being supplied to the substrate, and the third sub-operation using a third plasma atmosphere obtained from at least two gases including the inert gas and an oxygen-containing reactive gas.

Abstract: Provided is a method of manufacturing a semiconductor device, the method including forming a first mold structure and a second mold structure on a semiconductor structure, the second mold structure being spaced apart from the first mold structure in a horizontal direction, the first mold structure including first insulating films and second insulating films different from the first insulating films alternately stacked one-by-one, and the second mold structure including a third insulating film including a material same as a material of each of the first insulating films, forming a mask pattern on the first mold structure and the second mold structure, and etching, using a first etching gas, the first mold structure and the second mold structure based on the mask pattern, wherein the first etching gas includes oxygen-containing fluorocarbon.

Abstract: Provided is a method for dry-etching a silicon oxide layer, the method includes selectively etching a first layer including the silicon oxide layer by allowing etching gas including hydrogen fluoride, an amine compound, and inert gas to react with a stack structure including the first layer and a second layer, which includes a material different from the silicon oxide layer and is stacked on the first layer, in which the first layer includes the silicon oxide layer, the selectively-etching includes allowing the etching gas to self-limiting react with the exposed region at the first layer and removing the region subject to the self-limiting reaction.

Abstract: A method of manufacturing a semiconductor device includes forming a mask pattern on a feature layer, modifying a surface of the mask pattern by using a plasmafied metal precursor gas to provide a modified surface, and etching the feature layer by using the mask pattern with the modified surface.

Abstract: A semiconductor device manufacturing method includes forming an inorganic layer on a support layer, forming organic mask patterns on the inorganic layer, and forming inorganic patterns and space patterns configured to at least partially expose the support layer between the inorganic patterns by performing a plasma etching process on the inorganic layer with the organic mask patterns as an etching mask. The plasma etching process has an etching selectivity that favors the inorganic layer relative to the organic mask patterns. The plasma etching process on the inorganic layer is performed by using a mixed gas including C2H2F4 gas as a main etching gas and O2 gas or an oxygen-containing gas as an auxiliary etching gas, and a ratio of the main etching gas to the auxiliary etching gas is configured as about 1 to about 5.

Abstract: A material including an alloy including aluminum of 99% by weight to 99.8% by weight, copper of 0.1% by weight to 0.5% by weight, and scandium of 0.1% by weight to 0.5% by weight, a metal line in a semiconductor device including the material, and a method for forming the metal line in the semiconductor device may be provided.

Abstract: The described technology relates generally to a material for a metal line in a semiconductor device including an alloy including aluminum as a main material, copper, and an element X, wherein the element X has 1) a coefficient of thermal expansion (CTE) of greater than about 0.55 ppm/K and less than about 5 ppm/K, 2) a melting point (MP) of greater than about 3000° C., and 3) electronegativity of greater than about 2.2, a metal line in a semiconductor device including the alloy, and a method of forming a metal line in a semiconductor device.