Patents by Inventor Buu Q. Diep

Buu Q. Diep has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10315918
    Abstract: Methods for reducing wafer bow induced by an anti-reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: June 11, 2019
    Assignee: RAYTHEON COMPANY
    Inventors: Roland W. Gooch, Buu Q. Diep, Stephen H. Black, Thomas A. Kocian, Adam M. Kennedy
  • Patent number: 10262913
    Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: April 16, 2019
    Assignee: RAYTHEON COMPANY
    Inventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
  • Publication number: 20180226309
    Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.
    Type: Application
    Filed: April 2, 2018
    Publication date: August 9, 2018
    Inventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
  • Patent number: 9969610
    Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: May 15, 2018
    Assignee: RAYTHEON COMPANY
    Inventors: Buu Q. Diep, Adam M. Kennedy, Thomas Allan Kocian, Mark Lamb
  • Patent number: 9966320
    Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: May 8, 2018
    Assignee: RAYTHEON COMPANY
    Inventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
  • Patent number: 9771258
    Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: September 26, 2017
    Assignee: RAYTHEON COMPANY
    Inventors: Buu Q. Diep, Adam M. Kennedy, Thomas Allan Kocian, Mark Lamb
  • Patent number: 9708181
    Abstract: A sealed package having a device disposed on a wafer structure and a lid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: July 18, 2017
    Assignee: Raytheon Company
    Inventors: Adam M. Kennedy, Buu Q. Diep, Stephen H. Black, Tse E. Wong, Thomas Allan Kocian, Gregory D. Tracy
  • Publication number: 20170129775
    Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.
    Type: Application
    Filed: January 26, 2017
    Publication date: May 11, 2017
    Inventors: Buu Q. Diep, Adam M. Kennedy, Thomas Allan Kocian, Mark Lamb
  • Publication number: 20170011977
    Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.
    Type: Application
    Filed: September 20, 2016
    Publication date: January 12, 2017
    Inventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
  • Publication number: 20160376146
    Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.
    Type: Application
    Filed: June 24, 2015
    Publication date: December 29, 2016
    Inventors: Buu Q. Diep, Adam M. Kennedy, Thomas Allan Kocian, Mark Lamb
  • Patent number: 9520332
    Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: December 13, 2016
    Assignee: RAYTHEON COMPANY
    Inventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
  • Publication number: 20160340179
    Abstract: Methods for reducing wafer bow induced by an anti-reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.
    Type: Application
    Filed: August 3, 2016
    Publication date: November 24, 2016
    Inventors: Roland W. Gooch, Buu Q. Diep, Stephen H. Black, Thomas A. Kocian, Adam M. Kennedy
  • Patent number: 9427776
    Abstract: Methods for reducing wafer bow induced by an anti-reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: August 30, 2016
    Assignee: RAYTHEON COMPANY
    Inventors: Roland W. Gooch, Buu Q. Diep, Stephen H. Black, Thomas A. Kocian, Adam M. Kennedy
  • Publication number: 20160167959
    Abstract: A sealed package having a device disposed on a wafer structure and a lid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.
    Type: Application
    Filed: February 19, 2016
    Publication date: June 16, 2016
    Applicant: Raytheon Company
    Inventors: Adam M. Kennedy, Buu Q. Diep, Stephen H. Black, Tse E. Wong, Thomas Allan Kocian, Gregory D. Tracy
  • Patent number: 9334154
    Abstract: A sealed package having a device disposed on a wafer structure and a lid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: May 10, 2016
    Assignee: RAYTHEON COMPANY
    Inventors: Adam M. Kennedy, Buu Q. Diep, Stephen H. Black, Tse E. Wong, Thomas Allan Kocian, Gregory D. Tracy
  • Publication number: 20160039665
    Abstract: A sealed package having a device disposed on a wafer structure and slid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.
    Type: Application
    Filed: August 11, 2014
    Publication date: February 11, 2016
    Inventors: Adam M. Kennedy, Buu Q. Diep, Stephen H. Black, Tse E. Wong, Thomas Allan Kocian, Gregory D. Tracy
  • Patent number: 9227839
    Abstract: A structure for detecting electromagnetic radiation having a predetermined wavelength. The structure includes a device wafer having a sensing element disposed on a predetermined region of a surface of the device wafer responsive to the electromagnetic radiation. A cover wafer is provided having a region thereof transparent to the electromagnetic radiation for passing the electromagnetic radiation through the transparent region onto a surface of the sensing element. A bond gap spacer structure is provided for supporting the surface of the sensing element from an opposing surface of the transparent region of the cover wafer a distance less than a fraction of the predetermined wavelength when the cover wafer is bonded to the device wafer.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: January 5, 2016
    Assignee: RAYTHEON COMPANY
    Inventors: Roland W. Gooch, Stephen H. Black, Thomas A. Kocian, Adam M. Kennedy, Buu Q. Diep
  • Publication number: 20150321905
    Abstract: A structure for detecting electromagnetic radiation having a predetermined wavelength. The structure includes a device wafer having a sensing element disposed on a predetermined region of a surface of the device wafer responsive to the electromagnetic radiation. A cover wafer is provided having a region thereof transparent to the electromagnetic radiation for passing the electromagnetic radiation through the transparent region onto a surface of the sensing element. A bond gap spacer structure is provided for supporting the surface of the sensing element from an opposing surface of the transparent region of the cover wafer a distance less than a fraction of the predetermined wavelength when. the cover wafer is bonded to the device wafer.
    Type: Application
    Filed: May 6, 2014
    Publication date: November 12, 2015
    Applicant: RAYTHEON COMPANY
    Inventors: Roland W. Gooch, Stephen H. Black, Thomas A. Kocian, Adam M. Kennedy, Buu Q. Diep
  • Publication number: 20150279755
    Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.
    Type: Application
    Filed: June 10, 2015
    Publication date: October 1, 2015
    Inventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
  • Patent number: 9132496
    Abstract: In certain embodiments, a system includes a deposition system and a plasma/bonding system. The deposition system deposits a solder outwardly from a substrate of a number of substrates. The plasma/bonding system comprises a plasma system configured to plasma clean the substrate and a bonding system configured to bond the substrates. The plasma/bonding system at least reduces reoxidation of the solder. In certain embodiments, a method comprises depositing solder outwardly from a substrate, removing metal oxide from the substrate, and depositing a capping layer outwardly from the substrate to at least reduce reoxidation of the solder.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: September 15, 2015
    Assignee: Raytheon Company
    Inventors: Buu Q. Diep, Thomas A. Kocian, Roland W. Gooch