Abstract: A thin film transistor substrate includes a substrate including a display area and a peripheral area surrounding the display area, gate lines formed on the substrate including gate electrodes, an auxiliary insulating layer formed on the gate lines, a gate insulating layer formed on the auxiliary insulating layer and the gate lines, a semiconductor layer formed on the gate insulating layer, data lines formed on the semiconductor layer including source electrodes and drain electrodes, a passivation layer formed on the data lines, pixel electrodes formed on the passivation layer and electrically connected to the drain electrode, wherein the boundary line of the auxiliary insulating layer is located at or within the boundary of the gate line.