Abstract: An object of the present inventive concept is providing a nonvolatile memory device having improved reliability by compensating a threshold voltage of a flash memory cell. A nonvolatile memory device according to the present inventive concept includes a memory cell array connected to a plurality of word lines; and a voltage generator for supplying a select read voltage to a select word line and an unselect read voltage to an unselect word line among the plurality of word lines when a read operation is performed. The voltage generator generates the unselect read voltage having a different level according to whether the unselect word line is adjacent to the select word line or not. A nonvolatile memory device according to the present inventive concept compensates a threshold voltage increased or decreased due to various causes. According to the present inventive concept, reliability of a nonvolatile memory device is improved.

Abstract: A memory transistor including a substrate, a tunnel insulating pattern on the substrate, a charge storage pattern on the tunnel insulating pattern, a blocking insulating pattern on the charge storage pattern, and a gate electrode on the blocking insulating pattern, the blocking insulating pattern surrounding the gate electrode and methods of operating and fabricating the same. A nonvolatile memory may further include a plurality of memory transistors in series and a plurality of auxiliary structures between each of the plurality of unit transistors in series. Each of the plurality of auxiliary structures may be a dummy mask pattern or an assistant gate structure.

Abstract: Integrated circuit flash memory devices, such as NAND flash memory devices, include an array of regular flash memory cells, an array of dummy flash memory cells and an erase controller. The erase controller is configured to concurrently apply a different predetermined bias voltage to the dummy flash memory cells than to the regular flash memory cells during an erase operation of the integrated circuit flash memory device. Related methods are also described.

Abstract: A memory transistor including a substrate, a tunnel insulating pattern on the substrate, a charge storage pattern on the tunnel insulating pattern, a blocking insulating pattern on the charge storage pattern, and a gate electrode on the blocking insulating pattern, the blocking insulating pattern surrounding the gate electrode and methods of operating and fabricating the same. A nonvolatile memory may further include a plurality of memory transistors in series and a plurality of auxiliary structures between each of the plurality of unit transistors in series. Each of the plurality of auxiliary structures may be a dummy mask pattern or an assistant gate structure.

Abstract: An object of the present inventive concept is providing a nonvolatile memory device having improved reliability by compensating a threshold voltage of a flash memory cell. A nonvolatile memory device according to the present inventive concept includes a memory cell array connected to a plurality of word lines; and a voltage generator for supplying a select read voltage to a select word line and an unselect read voltage to an unselect word line among the plurality of word lines when a read operation is performed. The voltage generator generates the unselect read voltage having a different level according to whether the unselect word line is adjacent to the select word line or not. A nonvolatile memory device according to the present inventive concept compensates a threshold voltage increased or decreased due to various causes. According to the present inventive concept, reliability of a nonvolatile memory device is improved.

Abstract: A memory transistor including a substrate, a tunnel insulating pattern on the substrate, a charge storage pattern on the tunnel insulating pattern, a blocking insulating pattern on the charge storage pattern, and a gate electrode on the blocking insulating pattern, the blocking insulating pattern surrounding the gate electrode and methods of operating and fabricating the same. A nonvolatile memory may further include a plurality of memory transistors in series and a plurality of auxiliary structures between each of the plurality of unit transistors in series. Each of the plurality of auxiliary structures may be a dummy mask pattern or an assistant gate structure.

Abstract: Integrated circuit flash memory devices, such as NAND flash memory devices, include an array of regular flash memory cells, an array of dummy flash memory cells and an erase controller. The erase controller is configured to concurrently apply a different predetermined bias voltage to the dummy flash memory cells than to the regular flash memory cells during an erase operation of the integrated circuit flash memory device. Related methods are also described.

Abstract: A memory transistor including a substrate, a tunnel insulating pattern on the substrate, a charge storage pattern on the tunnel insulating pattern, a blocking insulating pattern on the charge storage pattern, and a gate electrode on the blocking insulating pattern, the blocking insulating pattern surrounding the gate electrode and methods of operating and fabricating the same. A nonvolatile memory may further include a plurality of memory transistors in series and a plurality of auxiliary structures between each of the plurality of unit transistors in series. Each of the plurality of auxiliary structures may be a dummy mask pattern or an assistant gate structure.