Patents by Inventor Byeong-kook Park

Byeong-kook Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7220599
    Abstract: A magneto-resistive random access memory includes a MOS transistor having a first gate and source and drain junctions on a substrate, a lower electrode connected to the source junction, a first magnetic layer on the lower electrode, a dielectric barrier layer including aluminum and hafnium on the first magnetic layer which, together with the first magnetic layer, form a potential well, a second magnetic layer on the dielectric barrier layer opposite the first magnetic layer, an upper electrode on the second magnetic layer, a second gate interposed between the first gate and the lower electrode to control the magnetic data of one of the first and second magnetic layers, and a bit line positioned orthogonal to the first gate and electrically connected to the upper electrode. Improved characteristics of the barrier layer increase a magnetic resistance ratio and improve data storage capacity of the magneto-resistive random access memory.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: May 22, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wan-jun Park, Taek-dong Lee, Byeong-kook Park, Tae-wan Kim, I-hun Song, Sang-jin Park
  • Publication number: 20050036399
    Abstract: A magneto-resistive random access memory includes a MOS transistor having a first gate and source and drain junctions on a substrate, a lower electrode connected to the source junction, a first magnetic layer on the lower electrode, a dielectric barrier layer including aluminum and hafnium on the first magnetic layer which, together with the first magnetic layer, form a potential well, a second magnetic layer on the dielectric barrier layer opposite the first magnetic layer, an upper electrode on the second magnetic layer, a second gate interposed between the first gate and the lower electrode to control the magnetic data of one of the first and second magnetic layers, and a bit line positioned orthogonal to the first gate and electrically connected to the upper electrode. Improved characteristics of the barrier layer increase a magnetic resistance ratio and improve data storage capacity of the magneto-resistive random access memory.
    Type: Application
    Filed: September 28, 2004
    Publication date: February 17, 2005
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Wan-jun Park, Taek-dong Lee, Byeong-kook Park, Tae-wan Kim, I-hun Song, Sang-jin Park
  • Patent number: 6815784
    Abstract: A magneto-resistive random access memory includes a MOS transistor having a first gate and source and drain junctions on a substrate, a lower electrode connected to the source junction, a first magnetic layer on the lower electrode, a dielectric barrier layer including aluminum and hafnium on the first magnetic layer which, together with the first magnetic layer, form a potential well, a second magnetic layer on the dielectric barrier layer opposite the first magnetic layer, an upper electrode on the second magnetic layer, a second gate interposed between the first gate and the lower electrode to control the magnetic data of one of the first and second magnetic layers, and a bit line positioned orthogonal to the first gate and electrically connected to the upper electrode. Improved characteristics of the barrier layer increase a magnetic resistance ratio and improve data storage capacity of the magneto-resistive random access memory.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: November 9, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wan-jun Park, Taek-dong Lee, Byeong-kook Park, Tae-wan Kim, I-hun Song, Sang-jin Park
  • Publication number: 20030222322
    Abstract: A magneto-resistive random access memory includes a MOS transistor having a first gate and source and drain junctions on a substrate, a lower electrode connected to the source junction, a first magnetic layer on the lower electrode, a dielectric barrier layer including aluminum and hafnium on the first magnetic layer which, together with the first magnetic layer, form a potential well, a second magnetic layer on the dielectric barrier layer opposite the first magnetic layer, an upper electrode on the second magnetic layer, a second gate interposed between the first gate and the lower electrode to control the magnetic data of one of the first and second magnetic layers, and a bit line positioned orthogonal to the first gate and electrically connected to the upper electrode. Improved characteristics of the barrier layer increase a magnetic resistance ratio and improve data storage capacity of the magneto-resistive random access memory.
    Type: Application
    Filed: May 28, 2003
    Publication date: December 4, 2003
    Inventors: Wan-jun Park, Taek-dong Lee, Byeong-kook Park, Tae-wan Kim, I-hun Song, Sang-Jin Park