Abstract: In a display device, each of pixels includes a light emitting element and a pixel circuit which is connected to the light emitting element at a first node and drives the light emitting element in response to a corresponding driving scan signal among driving scan signals during a display period. The pixel circuit is connected to a corresponding readout line among readout lines at a second node. The sensing circuit senses a potential of the first node through the corresponding readout line during a blank period, and each of frames includes the display period and the blank period. At least two driving scan signals among the driving scan signals respectively include a plurality of rewriting periods, each of which is activated during the blank period corresponding thereto, and the rewriting periods of the driving scan signals have different durations from each other.

Abstract: In a display device, each of pixels includes a light emitting element and a pixel circuit which is connected to the light emitting element at a first node and drives the light emitting element in response to a corresponding driving scan signal among driving scan signals during a display period. The pixel circuit is connected to a corresponding readout line among readout lines at a second node. The sensing circuit senses a potential of the first node through the corresponding readout line during a blank period, and each of frames includes the display period and the blank period. At least two driving scan signals among the driving scan signals respectively include a plurality of rewriting periods, each of which is activated during the blank period corresponding thereto, and the rewriting periods of the driving scan signals have different durations from each other.

Abstract: A display device includes a pixel unit that includes a plurality of pixels, a compensator configured to receive sensing data from the pixel unit in a sensing period and that detects and compensates for a characteristic of the pixels, and a timing controller configured to convert an image signal received from an outside into image data.

Abstract: In a display device, each of pixels includes a light emitting element and a pixel circuit which is connected to the light emitting element at a first node and drives the light emitting element in response to a corresponding driving scan signal among driving scan signals during a display period. The pixel circuit is connected to a corresponding readout line among readout lines at a second node. The sensing circuit senses a potential of the first node through the corresponding readout line during a blank period, and each of frames includes the display period and the blank period. At least two driving scan signals among the driving scan signals respectively include a plurality of rewriting periods, each of which is activated during the blank period corresponding thereto, and the rewriting periods of the driving scan signals have different durations from each other.

Abstract: A driving method of a display device including a power source which supplies a power voltage to a power base line, and pixels connected to power branch lines commonly connected to the power base line, includes calculating a first scale factor based on input grayscales received during a first frame period; calculating first output grayscales by applying the first scale factor to first input grayscales received during a second frame period, where the second frame period is a frame period immediately next to the first frame period; displaying an image by at least a part of the pixels based on the first output grayscales; and providing a first current limiting signal to the power source and calculating a second scale factor smaller than the first scale factor when a current of the power base line exceeds a reference value.

Abstract: A display device includes: a low drop-out (“LDO”) regulator which provides a second power voltage to a power line during a first period of one frame; a buck converter which provides a first power voltage to the power line during a third period of the one frame; and a pixel connected to the LDO regulator and the buck converter through the power line. A voltage level of the second power voltage is equal to a voltage level of the first power voltage.

Abstract: A display device includes: a low drop-out (“LDO”) regulator which provides a second power voltage to a power line during a first period of one frame; a buck converter which provides a first power voltage to the power line during a third period of the one frame; and a pixel connected to the LDO regulator and the buck converter through the power line. A voltage level of the second power voltage is equal to a voltage level of the first power voltage.

Abstract: A driving method of a display device including a power source which supplies a power voltage to a power base line, and pixels connected to power branch lines commonly connected to the power base line, includes calculating a first scale factor based on input grayscales received during a first frame period; calculating first output grayscales by applying the first scale factor to first input grayscales received during a second frame period, where the second frame period is a frame period immediately next to the first frame period; displaying an image by at least a part of the pixels based on the first output grayscales; and providing a first current limiting signal to the power source and calculating a second scale factor smaller than the first scale factor when a current of the power base line exceeds a reference value.

Abstract: A display device according to an embodiment of the disclosure includes a display circuit including pixels divided into a plurality of blocks, a power interface which outputs block currents, a current sensor which senses the block currents and outputs sensing values of the block currents, and a block current controller which outputs a control voltage for controlling a block current supplied to a deterioration block. The power interface includes a plurality of transistors each including a first electrode connected to a first power supply, a second electrode connected to a first power supply line, and a gate electrode connected to a control line.

Abstract: A display panel driving apparatus includes a data driver, a gate driver, an extra resistance part through which a constant current passes, and a circuit configured to generate a first gamma voltage, and output a first extra gamma voltage indirectly to the data driver through the extra resistance part. The data driver is configured to generate a data signal based on the first gamma voltage and output the data signal to a data line of a display panel. The gate driver is configured to output a gate signal to a gate line of the display panel.

Abstract: A display panel driving apparatus includes a data driver, a gate driver, an extra resistance part through which a constant current passes, and a circuit configured to generate a first gamma voltage, and output a first extra gamma voltage indirectly to the data driver through the extra resistance part. The data driver is configured to generate a data signal based on the first gamma voltage and output the data signal to a data line of a display panel. The gate driver is configured to output a gate signal to a gate line of the display panel.

Abstract: A display panel driving apparatus includes a data driver, a gate driver, an extra resistance part through which a constant current passes, and a circuit configured to generate a first gamma voltage, and output a first extra gamma voltage indirectly to the data driver through the extra resistance part. The data driver is configured to generate a data signal based on the first gamma voltage and output the data signal to a data line of a display panel. The gate driver is configured to output a gate signal to a gate line of the display panel.

Abstract: A pixel circuit includes a scan transistor connected between a data line and a first node and being configured to receive a scan signal, an emission control transistor connected between a first power supply and a second node and being configured to receive an emission control signal, a driving transistor connected between the second node and a third node and being connected to the first node, an initialize transistor being configured to receive an initialization signal, a storage capacitor connected between the first node and the third node; an organic light emitting diode connected between the third node and a second power supply, a charge share capacitor connected between a fourth node and the second power supply; and a charge share transistor configured to connect the charge share capacitor to the storage capacitor, the charge share transistor being configured to receive a charge share control signal.

Abstract: A display device includes a display panel, a power supply unit, a first current measuring unit, and an overcurrent preventing switch. The power supply unit provides a power supply voltage to the display panel. The first current measuring unit is connected to a first path for providing the power supply voltage from the power supply unit to the display panel and measures a first current flowing through the first path. The overcurrent preventing switch is connected in parallel with the first current measuring unit and selectively forms a detour path for the first path according to an amount of the first current such that at least a portion of the first current flows through the detour path.

Abstract: A display device includes a data driver configured to generate a data signal based on a data voltage; a display panel configured to be driven based on a first power supply voltage and the data signal; a timing controller configured to control operations of the data driver and the display panel and configured to generate a ready signal indicating a power supply timing; a first voltage regulator configured to generate the first power supply voltage based on a first input voltage and a first enable signal; a second voltage regulator configured to generate the data voltage based on the first input voltage and a second enable signal; and a power sequence controller configured to generate the first enable signal based on the ready signal and the data voltage and configured to generate the second enable signal based on the ready signal and the first power supply voltage.

Abstract: A flat panel display includes a signal generator to generate data signals to respective data lines via an output terminal or to generate a control signal for controlling switches. The signal generator includes a first voltage supply unit to supply, to the output terminal, a voltage of a first voltage sources, a voltage stabilizing unit to raise or drop the voltage supplied to the output terminal, and a second voltage supply unit to supply, to the output terminal, a voltage from a second voltage source, after the voltage of the output terminal is raised or dropped.

Abstract: A display panel includes input power supply line coupled to a power supply at one or more edge portions of the display panel, and an output power supply line coupled to the input power supply line at a predetermined portion of the display panel. The input power supply line receives the power supply voltage, and the output power supply line receives the power supply voltage from the input power supply line. The power supply is coupled to the output power supply line at the one or more edge portions of the display panel, and receives the power supply voltage from the output power supply line to adjust a voltage level of the power supply voltage based on the power supply voltage from the output power supply line. The predetermined portion is at a location different from an edge of the display panel.

Abstract: A display panel driving apparatus includes a data driver, a gate driver, an extra resistance part through which a constant current passes, and a circuit configured to generate a first gamma voltage, and output a first extra gamma voltage indirectly to the data driver through the extra resistance part. The data driver is configured to generate a data signal based on the first gamma voltage and output the data signal to a data line of a display panel. The gate driver is configured to output a gate signal to a gate line of the display panel.

Abstract: A pixel circuit includes a scan transistor connected between a data line and a first node and being configured to receive a scan signal, an emission control transistor connected between a first power supply and a second node and being configured to receive an emission control signal, a driving transistor connected between the second node and a third node and being connected to the first node, an initialize transistor being configured to receive an initialization signal, a storage capacitor connected between the first node and the third node; an organic light emitting diode connected between the third node and a second power supply, a charge share capacitor connected between a fourth node and the second power supply; and a charge share transistor configured to connect the charge share capacitor to the storage capacitor, the charge share transistor being configured to receive a charge share control signal.

Abstract: A power voltage generating apparatus supplies a power voltage to a plurality of pixel circuits of a display apparatus. The power voltage generating apparatus includes: a high voltage converter to generate a high voltage; a low voltage converter to generate a low voltage; a switching circuit to alternately output the high voltage and the low voltage at a power voltage terminal as the power voltage; and a discharging unit coupled to the power voltage terminal and configured to discharge the power voltage terminal until a voltage output is converted from the high voltage to the low voltage by using the switching circuit.