Patents by Inventor Byeung Ho Kim

Byeung Ho Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11784100
    Abstract: A method of manufacturing a flip chip package includes forming a plurality of semiconductor chips and bonding the semiconductor chips to a package substrate. The method further includes electrically testing the plurality of semiconductor chips on the package substrate, molding the tested semiconductor chips, and singulating the molded chips. Electrically testing the semiconductor chips includes covering the semiconductor chips with a protection member.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: October 10, 2023
    Assignee: SK hynix Inc.
    Inventors: Jee Won Chung, Dong Jin Kim, Byeung Ho Kim, Chang Hyun Kim
  • Publication number: 20220037214
    Abstract: A method of manufacturing a flip chip package includes forming a plurality of semiconductor chips and bonding the semiconductor chips to a package substrate. The method further includes electrically testing the plurality of semiconductor chips on the package substrate, molding the tested semiconductor chips, and singulating the molded chips. Electrically testing the semiconductor chips includes covering the semiconductor chips with a protection member.
    Type: Application
    Filed: October 15, 2021
    Publication date: February 3, 2022
    Applicant: SK hynix Inc.
    Inventors: Jee Won CHUNG, Dong Jin KIM, Byeung Ho KIM, Chang Hyun KIM
  • Patent number: 11177184
    Abstract: A method of manufacturing a flip chip package includes forming a plurality of semiconductor chips and bonding the semiconductor chips to a package substrate. The method further includes electrically testing the plurality of semiconductor chips on the package substrate, molding the tested semiconductor chips, and singulating the molded chips. Electrically testing the semiconductor chips includes covering the semiconductor chips with a protection member.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: November 16, 2021
    Assignee: SK hynix Inc.
    Inventors: Jee Won Chung, Dong Jin Kim, Byeung Ho Kim, Chang Hyun Kim
  • Publication number: 20200357705
    Abstract: A method of manufacturing a flip chip package includes forming a plurality of semiconductor chips and bonding the semiconductor chips to a package substrate. The method further includes electrically testing the plurality of semiconductor chips on the package substrate, molding the tested semiconductor chips, and singulating the molded chips. Electrically testing the semiconductor chips includes covering the semiconductor chips with a protection member.
    Type: Application
    Filed: October 30, 2019
    Publication date: November 12, 2020
    Applicant: SK hynix Inc.
    Inventors: Jee Won CHUNG, Dong Jin KIM, Byeung Ho KIM, Chang Hyun KIM
  • Patent number: 8298865
    Abstract: A method for manufacturing a substrate for a semiconductor package includes the steps of attaching first and second insulation layers which have first surfaces and second surfaces and are formed with conductive layers on the first surfaces, by the medium of a release film which has adhesives attached to both surfaces thereof, such that the second surfaces of the first and second insulation layers face each other; forming first conductive patterns on the first surfaces of the first and second insulation layers by patterning the conductive layers; forming solder masks on the first surfaces of the first and second insulation layers including the first conductive patterns to open portions of the first conductive patterns; and separating the first and second insulation layers from each other by removing the release film.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: October 30, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Young Berm Jung, Hong Bum Park, Young Geon Kwon, Seong Kwon Chin, Byeung Ho Kim, Seok Koo Jung
  • Publication number: 20120118495
    Abstract: A method for manufacturing a substrate for a semiconductor package includes the steps of attaching first and second insulation layers which have first surfaces and second surfaces and are formed with conductive layers on the first surfaces, by the medium of a release film which has adhesives attached to both surfaces thereof, such that the second surfaces of the first and second insulation layers face each other; forming first conductive patterns on the first surfaces of the first and second insulation layers by patterning the conductive layers; forming solder masks on the first surfaces of the first and second insulation layers including the first conductive patterns to open portions of the first conductive patterns; and separating the first and second insulation layers from each other by removing the release film.
    Type: Application
    Filed: January 25, 2012
    Publication date: May 17, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Young Berm JUNG, Hong Bum PARK, Young Geon KWON, Seong Kwon CHIN, Byeung Ho KIM, Seok Koo JUNG
  • Patent number: 8125086
    Abstract: A method for manufacturing a substrate for a semiconductor package includes the steps of attaching first and second insulation layers which have first surfaces and second surfaces and are formed with conductive layers on the first surfaces, by the medium of a release film which has adhesives attached to both surfaces thereof, such that the second surfaces of the first and second insulation layers face each other; forming first conductive patterns on the first surfaces of the first and second insulation layers by patterning the conductive layers; forming solder masks on the first surfaces of the first and second insulation layers including the first conductive patterns to open portions of the first conductive patterns; and separating the first and second insulation layers from each other by removing the release film.
    Type: Grant
    Filed: May 26, 2009
    Date of Patent: February 28, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Young Berm Jung, Hong Bum Park, Young Geon Kwon, Seong Kwon Chin, Byeung Ho Kim, Seok Koo Jung
  • Publication number: 20090294972
    Abstract: A method for manufacturing a substrate for a semiconductor package includes the steps of attaching first and second insulation layers which have first surfaces and second surfaces and are formed with conductive layers on the first surfaces, by the medium of a release film which has adhesives attached to both surfaces thereof, such that the second surfaces of the first and second insulation layers face each other; forming first conductive patterns on the first surfaces of the first and second insulation layers by patterning the conductive layers; forming solder masks on the first surfaces of the first and second insulation layers including the first conductive patterns to open portions of the first conductive patterns; and separating the first and second insulation layers from each other by removing the release film.
    Type: Application
    Filed: May 26, 2009
    Publication date: December 3, 2009
    Inventors: Young Berm JUNG, Hong Bum PARK, Young Geon KWON, Seong Kwon CHIN, Byeung Ho KIM, Seok Koo JUNG