Patents by Inventor Byoung-Ha Oh

Byoung-Ha Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240083351
    Abstract: A lighting device includes a light guide plate configured to guide and diffuse a light from a light source, and a garnish body including a lighting area to which the diffused light is radiated, wherein the light guide plate is disposed at a predetermined angle with respect to the garnish body.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 14, 2024
    Inventors: Jun Geun Oh, Min Ha Lee, Kyu Rok Kim, Byoung Wook Kim, Hoe Won Jung, Ho Sung Shin, Seong Cheon Cho
  • Patent number: 8040201
    Abstract: A substrate includes a power plane and a ground plane that are placed apart from and are substantially parallel to each other, and at least one signal line that is placed between the power plane and the ground plane. The ground plane includes a first conductive layer having a first conductivity. The power plane includes a second conductive layer having the first conductivity, and the power plane or the ground plane includes a third conductive layer having a second conductivity lower than the first conductivity. The third conductive layer faces the at least one signal line across a dielectric substance.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: October 18, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-Soo Park, Byoung-Ha Oh, Yong-Ho Ko
  • Patent number: 7821803
    Abstract: A memory module having a start-type topology and a method of fabricating the same are provided. The memory module includes a substrate. Memory devices are mounted on the substrate in at least two rows and at least two columns. A star-type topology is disposed to be electrically connected to the memory devices. One or more pairs of adjacent ones of the memory devices have a point-symmetric structure.
    Type: Grant
    Filed: August 6, 2008
    Date of Patent: October 26, 2010
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Do-Hyung Kim, Byoung-Ha Oh, Young-Jun Park, Yong-Ho Ko
  • Publication number: 20090184778
    Abstract: A substrate includes a power plane and a ground plane that are placed apart from and are substantially parallel to each other, and at least one signal line that is placed between the power plane and the ground plane. The ground plane includes a first conductive layer having a first conductivity. The power plane includes a second conductive layer having the first conductivity, and the power plane or the ground plane includes a third conductive layer having a second conductivity lower than the first conductivity. The third conductive layer faces the at least one signal line across a dielectric substance.
    Type: Application
    Filed: January 15, 2009
    Publication date: July 23, 2009
    Inventors: Kwang-Soo Park, Byoung-Ha Oh, Yong-Ho Ko
  • Publication number: 20090097297
    Abstract: A memory module having a start-type topology and a method of fabricating the same are provided. The memory module includes a substrate. Memory devices are mounted on the substrate in at least two rows and at least two columns. A star-type topology is disposed to be electrically connected to the memory devices. One or more pairs of adjacent ones of the memory devices have a point-symmetric structure.
    Type: Application
    Filed: August 6, 2008
    Publication date: April 16, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Do-Hyung Kim, Byoung-Ha Oh, Young-Jun Park, Yong-Ho Ko
  • Patent number: 7450398
    Abstract: An improved printed circuit board (PCB) includes first and second substrates, which are disposed being distanced or spaced mutually and in which at least one or more semiconductor chips are mounted, and a signal transmission part for providing a signal transmission path between the first and second substrates, the signal transmission part being extended out of a region having a size smaller than a maximum size of the first substrate within the first substrate, and being extended in the second substrate. In disposing two substrates in a spaced-apart structure of upper and lower positions, a length of flexible printed circuit (FPC) connecting the two substrates can be reduced, and an impedance mismatching caused in use of the FPC can be reduced.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: November 11, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoung-Ha Oh, Hwa-Jin Jung
  • Publication number: 20070202307
    Abstract: Disclosed herein is a rigid flexible PCB having openings. The rigid flexible PCB includes a flexible section with flexibility and rigid sections being formed at the edges of the flexible section with mechanical stiffness. The flexible section comprises a flexible plane. The flexible plane comprises a base insulating layer; a wire conducting layer being adhered to one of the top side and the bottom side of the base insulating layer; and a plane conducting layer adhered to the other of the top side and the bottom side of the base insulating layer. The plane conducting layer has a plurality of openings being formed as a mesh structure. According to the rigid flexible PCB of the invention, the flexibility of the flexible section and the characteristic impedance of signal wire traces may be improved.
    Type: Application
    Filed: December 1, 2006
    Publication date: August 30, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byoung-Ha OH, Jong-Hoon KIM
  • Publication number: 20070164448
    Abstract: Provided are a semiconductor chip package with attached electronic devices, and an integrated circuit module having the same. The semiconductor chip packages may include a supporting substrate, input/output bonding pads arranged on a first plane of the supporting substrate, and device bonding pads arranged on the edges of the first plane or portions of the first plane adjacent to the edges. Accordingly, the mount area of a printed circuit board may be reduced, efficient routing may be possible, and the occurrence of package cracks may be reduced and/or prevented.
    Type: Application
    Filed: August 17, 2006
    Publication date: July 19, 2007
    Inventors: Kyoung-Sun Kim, Ki-Hyun Ko, Byoung-Ha Oh
  • Publication number: 20070165390
    Abstract: An improved printed circuit board (PCB) includes first and second substrates, which are disposed being distanced or spaced mutually and in which at least one or more semiconductor chips are mounted, and a signal transmission part for providing a signal transmission path between the first and second substrates, the signal transmission part being extended out of a region having a size smaller than a maximum size of the first substrate within the first substrate, and being extended in the second substrate. In disposing two substrates in a spaced-apart structure of upper and lower positions, a length of flexible printed circuit (FPC) connecting the two substrates can be reduced, and an impedance mismatching caused in use of the FPC can be reduced.
    Type: Application
    Filed: July 20, 2006
    Publication date: July 19, 2007
    Inventors: Byoung-Ha Oh, Hwa-Jin Jung