Abstract: A MOS-gate power semiconductor device includes: a main device area including an active area and an edge termination area; and an auxiliary device area horizontally formed outside the main device area so as to include one or more diodes. Accordingly, it is possible to protect a circuit from an overcurrent and thus to prevent deterioration and/or destruction of a device due to the overcurrent.

Abstract: A MOS-gate power semiconductor device includes: a main device area including an active area and an edge termination area; and an auxiliary device area horizontally formed outside the main device area so as to include one or more diodes. Accordingly, it is possible to protect a circuit from an overcurrent and thus to prevent deterioration and/or destruction of a device due to the overcurrent.

Abstract: A MOS-gate power semiconductor device is provided which includes: one or more P-type wells formed under one or more of a gate metal electrode and a gate bus line and electrically connected to an emitter metal electrode; and one or more N-type wells formed in the P-type well and electrically connected to one or more of the gate metal electrode and the gate bus line. According to this configuration, it is possible to suppress deterioration and/or destruction of a device due to an overcurrent.

Abstract: Provided is an inverter circuit including a switching device which performs a switching operation corresponding to a gate control signal input to a gate terminal, converts an input DC to an AC, and outputs the AC; an HVIC which inputs the gate control signal to the gate terminal of the switching device; a controller which inputs to the HVIC a control signal for enabling the HVIC to generate the gate control signal; a bootstrap circuit which transmits energy to a high-side region of the HVIC; and an impedance cell which is located between the HVIC and one terminal of the switching device to reduce voltage drop of the high-side HVIC.

Abstract: Provided is an inverter circuit including a switching device which performs a switching operation corresponding to a gate control signal input to a gate terminal, converts an input DC to an AC, and outputs the AC; an HVIC which inputs the gate control signal to the gate terminal of the switching device; a controller which inputs to the HVIC a control signal for enabling the HVIC to generate the gate control signal; a bootstrap circuit which transmits energy to a high-side region of the HVIC; and an impedance cell which is located between the HVIC and one terminal of the switching device to reduce voltage drop of the high-side HVIC.