Abstract: A method for fabricating a CMOS field effect transistor with LDD (light doped drain) structure is disclosed. A first gate for an NMOS transistor and a second gate for a PMOS transistor are formed on a semiconductor substrate, and the NMOS and PMOS transistor regions are subjected to different ion implantation processes so as to form a first source and drain of low concentration. After forming a first spacer on the side walls of the gates, the substrate is subjected to another ion implantation so as to form a second source and drain of high concentration for the NMOS transistor. After forming a second spacer on the side surfaces of the first spacers, the substrate is subjected to still another ion implantation so as to form a second source and drain of high concentration for the PMOS transistor. Then is obtained a CMOS transistor provided with a PMOS transistor of LDD structure without increasing the diffusion resistance of an NMOS transistor.