Abstract: A vertical-type memory device includes a substrate having a cell array region and a connection region disposed adjacent to the cell array region, a plurality of gate electrode layers stacked on the cell array region and the connection region, a plurality of channel structures disposed in the cell array region, a plurality of dummy channel structures disposed in the connection region, and a plurality of slits disposed in the plurality of gate electrode layers in the cell array region. The plurality of gate electrode layers forms a stepped structure in the connection region, the plurality of channel structures penetrates the plurality of gate electrode layers, and the plurality of dummy channel structures penetrates at least one of the plurality of gate electrode layers.

Abstract: A vertical memory device is provided as follows. A substrate has a cell array region and a connection region adjacent to the cell array region. A first gate stack includes gate electrode layers spaced apart from each other in a first direction perpendicular to the substrate. The gate electrode layers extends from the cell array region to the connection region in a second direction perpendicular to the first direction to form a first stepped structure on the connection region. The first stepped structure includes a first gate electrode layer and a second gate electrode layer sequentially stacked. The second gate electrode layer includes a first region having the same length as a length of the first gate electrode layer and a second region having a shorter length than the length of the first gate electrode layer.

Abstract: A semiconductor device includes gate electrodes and interlayer insulating layers alternately stacked on a substrate, a channel layer penetrating through the gate electrodes and the interlayer insulating layers, and a gate dielectric layer disposed on an external surface of the channel layer between the gate electrodes and the channel layer. In addition, the channel layer includes a first region extended in a direction perpendicular to a top surface of the substrate and a second region connected to the first region in a lower portion of the first region and including a plane inclined with respect to the top surface of the substrate.

Abstract: A vertical memory device is provided as follows. A substrate has a cell array region and a connection region adjacent to the cell array region. A first gate stack includes gate electrode layers spaced apart from each other in a first direction perpendicular to the substrate. The gate electrode layers extends from the cell array region to the connection region in a second direction perpendicular to the first direction to form a first stepped structure on the connection region. The first stepped structure includes a first gate electrode layer and a second gate electrode layer sequentially stacked. The second gate electrode layer includes a first region having the same length as a length of the first gate electrode layer and a second region having a shorter length than the length of the first gate electrode layer.

Abstract: A vertical memory device includes gate electrodes spaced apart from each other in a first direction. Each of the gate electrodes extends in a second direction. Insulation patterns extend in the second direction between adjacent gate electrodes. A channel structure extends in the first direction. The channel structure extends through at least a portion of the gate electrode structure and at least a portion of the insulation pattern structure. The gate electrode structure includes at least one first gate electrode and a plurality of second gate electrodes sequentially stacked in the first direction on the substrate. Lower and upper surfaces of a first insulation pattern are bent away from the upper surface of the substrate along the first direction. A sidewall connecting the lower and upper surfaces of the first insulation pattern is slanted with respect to the upper surface of the substrate.

Abstract: A semiconductor device includes a substrate having a first region and a second region, the first region including memory cells, and the second region including transistors for driving the memory cells, and device isolation regions disposed within the substrate to define active regions of the substrate. The active regions include a first guard active region surrounding the first region, a second guard active region surrounding a portion of the second region, and at least one dummy active region disposed between the first guard active region and the second guard active region.

Abstract: A semiconductor device includes a substrate having first and second regions, a gate electrode stack having a plurality of gate electrodes vertically stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the substrate in the first region, and extending to have different lengths in a second direction parallel to the upper surface of the substrate from the first region to the second region, first and second isolation regions extending in the second direction perpendicular to the first direction, while penetrating through the gate electrode stack on the substrate, in the first and second regions, string isolation regions disposed between the first and second isolation regions in the first region, and extending in the second direction while penetrating through a portion of the gate electrode stack, and a plurality of auxiliary isolation regions disposed linearly with the string isolation regions in at least one of the first and second regions, and spaced apart from each

Abstract: A semiconductor device includes gate electrodes and interlayer insulating layers alternately stacked on a substrate, a channel layer penetrating through the gate electrodes and the interlayer insulating layers, and a gate dielectric layer disposed on an external surface of the channel layer between the gate electrodes and the channel layer. In addition, the channel layer includes a first region extended in a direction perpendicular to a top surface of the substrate and a second region connected to the first region in a lower portion of the first region and including a plane inclined with respect to the top surface of the substrate.

Abstract: A semiconductor device includes gate electrodes and interlayer insulating layers alternately stacked on a substrate, a channel layer penetrating through the gate electrodes and the interlayer insulating layers, and a gate dielectric layer disposed on an external surface of the channel layer between the gate electrodes and the channel layer. In addition, the channel layer includes a first region extended in a direction perpendicular to a top surface of the substrate and a second region connected to the first region in a lower portion of the first region and including a plane inclined with respect to the top surface of the substrate.

Abstract: A vertical memory device is provided as follows. A substrate has a cell array region and a connection region adjacent to the cell array region. A first gate stack includes gate electrode layers spaced apart from each other in a first direction perpendicular to the substrate. The gate electrode layers extends from the cell array region to the connection region in a second direction perpendicular to the first direction to form a first stepped structure on the connection region. The first stepped structure includes a first gate electrode layer and a second gate electrode layer sequentially stacked. The second gate electrode layer includes a first region having the same length as a length of the first gate electrode layer and a second region having a shorter length than the length of the first gate electrode layer.

Abstract: An image forming apparatus including a stepper motor, a component attached to the stepper motor, and a controller to control the stepper motor. The controller controls the stepper motor to be accelerated or decelerated, at driving frequencies that do not match a resonant frequency, in order to avoid a resonance between the stepper motor and the component, by selecting a speed control table that has the driving frequencies, which avoid the resonance. Thus, the image forming apparatus can avoid the resonance between the stepper motor and the component, minimize vibration and noise, and prevent malfunctions of the component. The image forming apparatus further comprises a first storage unit to store a resonant frequency of the component and, a second storage unit to store speed control tables having different driving frequencies, which are set according to speed control periods.

Abstract: A holder manufacturing method for loading a substrate of a semiconductor manufacturing device, a batch type boat having the holder, a loading/unloading method of a semiconductor substrate using the same, and a semiconductor manufacturing device having the same are disclosed. For example, the manufacturing method of the holder of the boat for loading a semiconductor substrate includes the steps of molding a holder substrate of a pipe shape having inner and outer circumference of a predetermined size in such a manner that a lower portion of the semiconductor substrate is seated thereon; and forming a plurality of holder rings by cutting the holder rings from the holder substrate in such a manner that each holder ring is matched to a disposal interval of the semiconductor substrates in the boat.

Abstract: A heating system of a batch type reaction chamber for semiconductor device and a method thereof are disclosed. Each heat unit of heating groups has different height and caloric value at right angles according to the divided areas, thereby it can control an uniform temperature incline of the entire process space of the reaction chamber. Also, the reflecting plates are formed by each heating unit, so that the change of the heating unit can be simple. Furthermore, the divided reflecting blocks are adjacently connected to another reflecting block through the radiant wave shielding slit between them, so that the leakage of the radiant wave can be prevented and the reflecting blocks can be separately attached and deattached to each other. Also, the turning member is formed at the lower portion of the reflecting blocks, so that it can be easily attached and deattached.

Abstract: Apparatus and method for forming a polycrystalline silicon thin film by converting an amorphous silicon thin film into the polycrystalline silicon thin film using a metal are provided. The method includes: a metal nucleus adsorbing step of introducing a vapor phase metal compound into a process space where the glass substrate having the amorphous silicon formed thereon is disposed, to adsorb a metal nucleus contained in the metal compound into the amorphous silicon layer; a metal nucleus distribution region-forming step of forming a community region including a plurality of silicon particles every metal nucleus in a plane boundary region occupied by the metal compound by a self-limited mechanism due to the adsorption of the metal nucleus; and an excess gas removing step of purging and removing an excess gas which is not adsorbed in the metal nucleus distribution region-forming step.

Abstract: An image forming apparatus including a stepper motor, a component attached to the stepper motor, and a controller to control the stepper motor. The controller controls the stepper motor to be accelerated or decelerated, at driving frequencies that do not match a resonant frequency, in order to avoid a resonance between the stepper motor and the component, by selecting a speed control table that has the driving frequencies, which avoid the resonance. Thus, the image forming apparatus can avoid the resonance between the stepper motor and the component, minimize vibration and noise, and prevent malfunctions of the component. The image forming apparatus further comprises a first storage unit to store a resonant frequency of the component and, a second storage unit to store speed control tables having different driving frequencies, which are set according to speed control periods.

Abstract: A semiconductor manufacturing device and a method thereof capable of processing semiconductor substrates having a large diameter in a state that the semiconductor substrates keep standing and are opposed to each other are disclosed. The semiconductor manufacturing device includes a reaction chamber for providing an airtight process space; a boat including a pair of susceptors as the processing device mounted to the reaction chamber; a driving device for rotating the susceptors; a heater; a loading device for inserting the heater into an inner space of the susceptors; a supply nozzle and an exhaust nozzle; and a lifting device for inserting the exhaust nozzle into the space between the holders. The semiconductor manufacturing device according to present invention can prevent the transformation of the semiconductor substrate and the contamination owing to the minute dust and maintain the uniform temperature gradient of the semiconductor substrate.

Abstract: A heating system of a batch type reaction chamber for semiconductor device and a method thereof are disclosed. Each heat unit of heating groups has different height and caloric value at right angles according to the divided areas, thereby it can control an uniform temperature incline of the entire process space of the reaction chamber. Also, the reflecting plates are formed by each heating unit, so that the change of the heating unit can be simple. Furthermore, the divided reflecting blocks are adjacently connected to another reflecting block through the radiant wave shielding slit between them, so that the leakage of the radiant wave can be prevented and the reflecting blocks can be separately attached and deattached to each other. Also, the turning member is formed at the lower portion of the reflecting blocks, so that it can be easily attached and deattached.

Abstract: The present invention relates to an apparatus for realizing personal shops in electronic commerce business. It is an object of the present invention to provide an apparatus for realizing personal shops in an electronic commerce business, which enables users to use shopping malls easily and conveniently by presenting contents screens fit for the member specialties by members and recommending goods suitable for the purchase pattern of the users.